428 Commits

Author SHA1 Message Date
James Turton
e453740aca rp: Increase spinner timeout to 500ms
Increasing spinner timeout to 500 means `tc_printf` is not called during
the `_flash_range_erase`. This is important as `_flash_range_erase` is
used when loading. This fixes the issue:
https://github.com/blacksphere/blackmagic/issues/875
Also adding spinner timeout counter to reduce bus traffic.
2021-05-16 11:26:14 +02:00
James Turton
67c9003522 rp: Flush cache after erase and write
The RP2040 datasheet suggests that _flash_flush_cache and _flash_enter_cmd_xip
should be called after erasing and writing to flash.
2021-05-16 11:26:14 +02:00
James Turton
f880734050 Fix compiling for native probe 2021-05-16 11:26:14 +02:00
Uwe Bonnes
e4421799ba More header cleanup 2021-05-15 12:54:51 +02:00
Uwe Bonnes
f9414d5826 cmsis-dap: Handle ADI DP22 devices on probes not multidrop capable. 2021-04-26 18:18:18 +02:00
Uwe Bonnes
1f67bab475 nxpke04: Move unsafe_enables to target bool union. 2021-04-25 16:03:23 +02:00
Uwe Bonnes
f87dff8d83 kinetis: Remove static variables, add word union to target_s.
Add a word union to target structure to hold a single word variable.
2021-04-25 16:03:23 +02:00
Uwe Bonnes
ac7c1057cc efm32/samd/samx5x: Remove static allocates strings. Allocate in priv_storage.
Static allocated variables in the different targets eat up common RAM and
will collide in chains with multiple similar targets.
2021-04-25 16:03:23 +02:00
Uwe Bonnes
cddf02f174 samx5: Verbose error reports on protected devices. 2021-04-25 16:03:23 +02:00
Uwe Bonnes
8c8aa980cf adiv5: Detect unprotected SAMD5x only once 2021-04-25 16:02:20 +02:00
Uwe Bonnes
1b26ff560d rp.c: Add reset_usb_boot as monitor command 2021-04-24 14:48:58 +02:00
Uwe Bonnes
52bffa70cf rp: Handle flash.
- Beware, after reset, only a valid flash payload get mapped to XIP!
  Only 0 is read from flash when flash image is not valid
2021-04-21 21:55:03 +02:00
Uwe Bonnes
2b0e255c40 cortexm: timeout and debug for run_stub() 2021-04-21 21:50:38 +02:00
Uwe Bonnes
61efe26348 swdp_scan: Break infinite loop after Dormant->SWD transition. 2021-04-21 21:50:38 +02:00
Uwe Bonnes
fa5e69e3be RP 2040: Special handling for rescue DP
As the rescue DP provided no AP, trigger the reset with attach().
However attach will indicate failure also reset/halt has succeeded.
2021-04-21 21:50:38 +02:00
Uwe Bonnes
ea92c8b8c8 cmsis-dap: Allow to use adiv5_swdp_scan. 2021-04-21 21:50:38 +02:00
Uwe Bonnes
23f942ac8c Raspberry RP2040: Recognize. No flash handling yet. 2021-04-21 21:50:35 +02:00
Uwe Bonnes
04d1c9805b swd: Remove swd_proc and swdptap.h. 2021-04-21 21:50:04 +02:00
Uwe Bonnes
b6fbf86743 Extend ADIv5_DP_t for low level routines needed for multi-drop.
Will replace swd_proc
2021-04-21 21:50:04 +02:00
Uwe Bonnes
5abb288c7a hosted: Provide the DP functions in swd_proc. 2021-04-21 21:50:04 +02:00
Uwe Bonnes
fa561c8d66 adiv5_swdp: Starting point to handle multi-drop
- RP2040 show both DPs
- Multidrop test with STM32L552 and STM32H745 allows selection
  with "-m 0x4500041" (H7), "-m 1" (L552) or "-m 0x01002927" (RP2040)
2021-04-21 21:50:04 +02:00
Uwe Bonnes
be3bfc48a8 cortexm: M33 has up to 8 hardware breakpoints 2021-04-21 21:22:59 +02:00
Uwe Bonnes
b1ac4187b9 Fix some formatting strings for 32-bit compile 2021-04-21 21:22:59 +02:00
Fabio Baltieri
beaccf2714 target: stm32l4: add support for STM32WLxx
This adds support for the STM32WL series in stm32l4.c. These parts have
the same flash registers layout as the L4 series, but a different base.
Since there are already two sets of registers in this target file, this
adds support for register maps that can be customized for each device
ID.
2021-04-20 18:42:36 +02:00
Fabio Baltieri
f55ad67b1b adiv5: catch timeout on adiv5_ap_read_id and abort
This adds a TRY_CATCH around the adiv5_ap_read_id() in
adiv5_component_probe() and resets the DP when that happens.
It seems like the STM32WLE5 comes with the AP of the inactive core
enabled in a way that does not make it detectable, and the current code
times out and leaves the whole device hanging.

Catching the timeout and calling adiv5_dp_abort() seems to restore the
device to a useable state.

Tested on Seed LoRa-E5 (STM32E5JC).
2021-04-19 16:57:13 +02:00
fabalthazar
d6b24c00c8 Fixed STM32G43x/G44x option bytes support
Previously took L4 values so FLASH_SEC1R was not applied
2021-04-17 14:44:30 +02:00
fabalthazar
99f9557cc0 Support for STM32G49x/G4Ax (category 4) 2021-04-17 14:44:30 +02:00
fabalthazar
c85c946ce3 PRIx32 fix 2021-04-17 14:44:30 +02:00
Uwe Bonnes
a6a8606edb STM32L55: Detect, memory map, read and flash write. Options handling missing.
Only non-secure states considered!
2021-04-04 17:26:31 +02:00
fabalthazar
6d6cfd6c98 Comprehensive STM32G03/4/5/6/7/8/B/C driver 2021-03-29 21:42:40 +02:00
Uwe Bonnes
58f153e12b cortexm: Always halt and release reset before romtable scan
Only release from halt once after romtable scan
Should fix #836.
2021-03-26 17:43:11 +01:00
Uwe Bonnes
a025c9a7bd Revert "stm32f1: On ST parts there is no need to read IDCODE again."
Romtable partno is not unique for devices, e.g. in STM32F0
This reverts commit f89b07d892c6034ea68494a72e047b2c437754f7.
2021-03-26 17:35:00 +01:00
Uwe Bonnes
f89b07d892 stm32f1: On ST parts there is no need to read IDCODE again.
IDCODE is already known from the Romtable
Probably this has the same effect as #836
2021-03-12 20:45:34 +01:00
Uwe Bonnes
7859a2aabd adiv5_swd: Factor out creation of packet request. 2021-03-06 13:30:09 +01:00
Uwe Bonnes
cfb784d428 adiv5: Fix comments and debug output 2021-03-05 16:49:19 +01:00
Thiadmer Riemersma
560a046a22 Add support for NXP LPC802, LPC804, LPC832 and LPC834 2021-02-22 19:37:46 +01:00
Uwe Bonnes
0df44e205b ADIv5: Abort Romtable scan also if CIDR0 is invalid after halting #832
STM32WLE5 has the same dual core chip as STM32WL5. For the second
core, the additional AP can be see, but access to e.g. CIDR0 for that
Romtable fails.
Aborting the scan too if again the second read of CIDR0 fails makes
sense anyways!
2021-02-19 18:48:02 +01:00
Uwe Bonnes
c776e7a9a6 swd_scan: Add '-m' as targetid argument to swd_scan to prepare multi-drop.
In a real multi-drop setup, the device to use must be specified.
2021-02-15 17:47:29 +01:00
Uwe Bonnes
8e2f6937d5 hosted: Run target specific monitor commands with -M "command" .
Lists available commands: "blackmagic -M help"
Quote multi argument monitor commands, e.g. STM32F1: blackmagic -M "option help"
2021-02-15 17:47:29 +01:00
Uwe Bonnes
165560edd8 cl_utils: target selection '-n' argument needs optarg.
foreach now returns the number of targets.
2021-02-15 17:47:29 +01:00
Alex Norman
42f590ce0b fixing some memory map errors for stm32h7, PR #821 2020-12-23 20:10:39 +01:00
Sean Cross
2b06f045c4 target: kinetis: add S32K148
This adds support for the NXP S32K148. This is an automotive-grade part
that is derived from the Kinetis line, so it has a very similar
interface to other parts in the family.

Signed-off-by: Sean Cross <sean@xobs.io>
2020-12-16 12:49:23 +01:00
Noah Pendleton
020600aa56 target/lpc546xx: fix lpc546xx flash support (#801)
**Summary**
Modifications to fix flash support on the lpc546xx:

- fix IAP entrypoint to be `0x03000204`, not the value at that address
- add a reset and attach sequence before erasing flash sectors. there's
little documentation around this, but experimentally, erasing sector 0
fails when the ROM bootloader is mapped to it (on reset). stepping the
chip once and attaching is enough to snap the chip out of it, permitting
flash erase on sector 0.
- add a few test commands to the lpc546xx table (read_uid, erase/write
sector, etc).
- write the magic CRC value when writing to sector 0
(`lpc_flash_write_magic_vect`).
- move the lpc546xx probe to before the lpc43xx probe, to prevent
getting the lpc546xx into Lockup when reading an illegal memory location
during lpc43xx probing

Fixes #786.

I don't 100% understand the reset/load sequence of this part, but these
changes are sufficient to program and debug the part now.

I didn't do a detailed analysis of what pyocd (via st-link hardware
adapter) and segger jlink do to handle the same, but both of those
worked without modification, so there's some difference in the
sequence they're using.

**Testing**
Verified I can now successfully erase and write an executable in sector
0 (and other sectors).
Verified the new commands work correctly.
2020-12-12 19:48:05 +01:00
Aaron Lindsay
518529a772 Support GD32E23x 2020-12-12 18:29:30 +01:00
Uwe Bonnes
dd6aadc54d jtag: Add verbosity about devices found. 2020-12-06 15:18:08 +01:00
Stoyan Shopov
e318f884bf Change the type of 'cortexm_wait_timeout' to unsigned.
It makes sense that the timeout value is unsigned, it also
resolves build errors on some platforms.
2020-12-04 11:44:50 +01:00
mean
e3fd12ebc6 gd32f1/f3 detection and ram/flash autoset 2020-12-03 11:16:47 +01:00
Jonathan Giles
575c25e570 Add support for STM32F1 clone with new AP_DESIGNER id 2020-12-01 10:23:16 +01:00
Uwe Bonnes
48a79ff9da adiv5: More checks for a sensible DPIDR. 2020-11-29 21:11:11 +01:00
Uwe Bonnes
752bc26536 adiv5: Fix memleak with duplicated base. 2020-11-29 21:11:11 +01:00