338 Commits

Author SHA1 Message Date
Uwe Bonnes
bdb351a6ea adiv5_swdp: On ACK_FAULT, error() and try again once #731
when writing CSW.
2020-09-18 20:07:32 +02:00
Damien Merenne
120b3134bb Add SAM4SD32C/B support. 2020-09-07 17:36:15 +02:00
Uwe Bonnes
8a2bce26f2 Hosted: Fix memory leak when platform_swdptap_init fails. 2020-09-04 11:49:13 +02:00
David Lawrence
f65afb1588 Use correct IAP entry address for LPC84x 2020-08-14 20:00:18 +02:00
Uwe Bonnes
71e9d78210 adiv5.c: Add another ARCH_ID found STM32F205. 2020-08-01 14:00:17 +02:00
Uwe Bonnes
1b12e407fd adiv5: Add missing arch identifiers for Cortex-M7 ETM. 2020-07-31 11:53:15 +02:00
Francesco Valla
696daa8352 adiv5: fix debug print of dev_type
Since dev_type is an 8 bit unsigned integer, use the PRIx8 macro instead
of PRIx32.
2020-07-29 11:32:24 +02:00
Uwe Bonnes
726d4b4496 adiv5.c: Add missing DEVTYPE and ARCHID to some existing PIDRs(#698,#699)
Probably more additions are needed.
2020-07-14 16:26:32 +02:00
Uwe Bonnes
09ceaea70f adiv5_swdp: Fix another memory leak. 2020-07-14 15:02:13 +02:00
Fredrik Ahlberg
7ebb94d134 cortexm: Add comment on CPUID register 2020-07-12 22:54:39 +02:00
Fredrik Ahlberg
4391851f4d adiv5: Change component descriptions from MTB to Micro Trace Buffer for consistency 2020-07-12 22:29:04 +02:00
Fredrik Ahlberg
0aadd0abce Adiv6: Add comment on DEVTYPE and ARCHID fields with references 2020-07-12 22:27:46 +02:00
Fredrik Ahlberg
fcd945a529 cortexm: Read CPUID to identify core version 2020-07-12 12:08:22 +02:00
Fredrik Ahlberg
39a20d78ff v8m: only check relevant bits in DHCSR when polling in cortexm_forced_halt 2020-07-12 12:07:12 +02:00
Fredrik Ahlberg
a35e9c8e5c Adiv6: Read DEVTYPE and ARCHID to identify Cortex-M23 and Cortex-M33 debug components 2020-07-12 12:00:31 +02:00
Uwe Bonnes
661f78033a stm32f1: Add F1 XL with dual bank handling, 2020-07-08 14:31:58 +02:00
Uwe Bonnes
eabd69dcdb Adiv5: Protect DBG/SYSTEM Power-Up request with timeout too.
CMSIS-DAP without connected target looped infinite in that situation.
2020-06-07 13:14:32 +02:00
Uwe Bonnes
dc3fd2eb06 Classify debug messages
Firmware BMP with ENABLE_DEBUG=1 will print WARN and INFO as before.
PC-Hosted BMPwill alway print to stderr. Warn is printed unconditional,
INFO, GDB, TARGET, DONGLE and WIRE will print if their appropriate bit in
cl_debuglevel is set via the -v verbose command line argument.
INFO will go to stdout with -t or -l.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
64f3dff8a8 PC-Hosted: Better debug output. 2020-06-05 14:59:30 +02:00
Valmantas Paliksa
b06c0ba8d5 bmp_remote: Use high level functions.
Based on #570 (OpenOCD HLA interface driver for Blackmagic), but now
usefull for bmp-remote.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
c3d509e6c0 Clean up PLATFORM_HAS_DEBUG
Use only for firmware platforms.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
563df2d354 Detour ADIv5 high-level functions. 2020-06-05 14:59:30 +02:00
Uwe Bonnes
9969c984f3 detour jtag primitives. 2020-06-05 14:59:30 +02:00
Uwe Bonnes
e34a27f72c Detour swd primitives. 2020-06-05 14:59:30 +02:00
Uwe Bonnes
b0cf7d24bd adiv5.c: Fix another leak. 2020-06-05 14:59:30 +02:00
Uwe Bonnes
783ec377d9 adiv5: Export extract. 2020-06-05 14:59:30 +02:00
Uwe Bonnes
966ac4036d target.c: Check for valid flash structure. 2020-06-05 14:59:30 +02:00
Uwe Bonnes
60f39f55b4 MSP432: Warn when hardware version not supported. 2020-06-05 14:59:30 +02:00
Uwe Bonnes
05adcd9bf5 remote.c: Compile only relevant functions.
Do no compile firmware functions when compiling pc-hosted.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
16967b4328 adiv5: Remove only local dp_idcode used from ADIv5_DP_t struct. 2020-06-05 14:59:30 +02:00
Uwe Bonnes
b8b34e7b1d adiv5: remove cfg for AP structure, cfg is only used local. 2020-06-05 14:59:30 +02:00
Dömötör Gulyás
69e330849d fix flash map for STM32G431, as it is a special case different from the STM32G47x and STM32G48x chips 2020-06-05 13:41:18 +02:00
Thomas Bénéteau
f9f928e9d6 Add support for LPC8N04 2020-06-05 12:33:51 +02:00
Koen De Vleeschauwer
6eb1b09c1c pc-hosted semihosting 2020-05-27 12:51:29 +02:00
Koen De Vleeschauwer
54ee00b0f6 set semihosting sys_clock time origin 2020-05-13 17:50:39 +02:00
Uwe Bonnes
499309f648 stm32f1: Tell user about STM32F10(3) clone. 2020-05-13 13:07:55 +02:00
Alexey Shvetsov
1a83bc6892
Rename variant_string in efm32 samd samx5x (#659)
* Rename variant_string

Files efm32 samd samx5x uses same function name that collides during
linking (checked with gcc10)

Signed-off-by: Alexey 'Alexxy' Shvetsov <alexxyum@gmail.com>

* Also make xxx_variant_string static

Signed-off-by: Alexey 'Alexxy' Shvetsov <alexxyum@gmail.com>
2020-05-12 17:47:04 +02:00
Uwe Bonnes
9b939f4a3a stm32f4: Fix option byte handling (#654)
Option bytes are not accessible with level 1 protection, so
Use FLASH_OPTCR(x)
Fix crash with "mon opt write xxxx"
Handle option manipulation better when HW Watchdog fuse is set
Allow abbreviated "mon option x<yyy>" commands
2020-05-05 12:52:32 +02:00
Sid Price
923949d5dd Fixed variable/function name clash building on Windows 2020-05-03 15:45:31 +02:00
Koen De Vleeschauwer
9f8c7be360 semihosting 2020-05-02 12:55:29 +02:00
Koen De Vleeschauwer
8851504a41 new semihosting commands 2020-04-23 09:43:46 +02:00
Uwe Bonnes
ada17ada23 stm32f4/7: Always use largest flashsize for device family (#633, #635, #644)
Do not care for the FLASHSIZE register. Leave it up to the user to abuse
flash area the ST did not announce.
2020-04-21 17:04:07 +02:00
Uwe Bonnes
164eb43f00 NRF5: Do not reset target options. 2020-04-14 19:01:43 +02:00
Uwe Bonnes
bea8436561 NRF5: Always set CORTEXM_TOPT_INHIBIT_SRST(#230)
The problem also happens with NRF52840. Set CORTEXM_TOPT_INHIBIT_SRST
for all NRF5 device.
People should be more persistent!
2020-04-14 18:11:23 +02:00
mean
d1468530bd add basic support for LPC11U68 (and maybe LPC11U68) 2020-04-06 23:36:49 +02:00
Francesco Valla
846dadcc39 lmi: add support for TM4C1294NCPDT 2020-04-03 19:42:24 +02:00
Uwe Bonnes
c4d7232223 Export function to read out PIDR and use for samd and samx5x. 2020-03-26 19:05:57 +01:00
Uwe Bonnes
a0e42e229b Make more things static.
No functional change intendend.
2020-03-26 18:44:19 +01:00
Uwe Bonnes
effd43ce38 Harden cortexm_reset() and remove double reset(#601)
Thanks to Dave Marples <dave@marples.net> for input.
- Issue only one reset. Start with SRST. Only if not seen, use SYSRESETREQ
- Wait for release of DHCSR_S_RESET_ST before issuing more commands
- Add timeout to catch reset line stuck low
- Remove AP errors
2020-03-25 11:22:14 +01:00
Uwe Bonnes
2e185ba578 BMP/PC: Allow to compile with mingw64 (#615)
__USE_MINGW_ANSI_STDIO 1 must be set befor any windows specific included.
2020-03-24 17:59:13 +01:00