212 Commits

Author SHA1 Message Date
Thomas Bénéteau
4a8cba0e9c Add support for LPC1114/333 (LPC1100XL series)
This is not given in the user manual but the register immediately
following DEVICE_ID does apparently contain the correct part ID.
2019-10-13 13:01:19 +02:00
Ken Healy
5c805c7d35 Fix buffer overflow in adiv5_component_probe() 2019-10-12 11:44:08 +02:00
Uwe Bonnes
0ae7cea1ae Add LPC84 from UM11029, Rev. 1.4, tested on LPC845 Breakout board. 2019-10-08 18:17:43 +02:00
Uwe Bonnes
1cf0b8ac13 Make all arguments for all commands (struct *t, int argc, const char **argv).
-Wall on gcc8 otherwise warns without -Wno-cast-function-type but older
GCCs/CLang choke on that argument:
error: unknown warning option '-Wno-cast-function-type'; did you mean
 '-Wno-bad-function-cast'? [-Werror,-Wunknown-warning-option]

This adds 24 byte to the binary, as some functions are now called with
additional dummy arguments:
"Pushing and popping garbage to keep the system happy"
2019-09-29 12:44:55 +02:00
Uwe Bonnes
f010a567bd adiv5: Reject APs duplicating last AP.
Seen with TM4C129 on black MSP432R401 Launchpad. Scanning of APs is aborted,
so valid APs after duplicated APs are ignored.
2019-09-29 12:44:37 +02:00
Uwe Bonnes
fae2966b72 Target: Default to nop-function() for all exported target functions.
Fixes #522.
2019-09-23 17:42:29 +02:00
UweBonnes
609e6b135d
nrf51: Add nop_function as halt_poll. (#517)
Otherwise "tar  ext ...; mon s; att 2; quit", start new gdb "tar ext ..."
crashes, at least on pc-hosted platforms.
2019-09-04 13:50:13 +02:00
UweBonnes
6663da7ff5
cortexm.c: Fix DWT Mask (#516)
See #513
2019-09-04 13:28:55 +02:00
UweBonnes
00937348b3
Fixes to compile "make ENABLE_DEBUG=1 all_platforms" (#515) 2019-09-04 13:09:43 +02:00
Gareth McMullin
e6504e149b cortexm: Implement single register read/write 2019-09-01 20:38:38 +02:00
Gareth McMullin
7bcf7f4924 cortexa: Implement single register read/write 2019-09-01 20:38:38 +02:00
Gareth McMullin
20cad17ce3 target: Implement generic multi-register read/write 2019-09-01 20:38:38 +02:00
Gareth McMullin
9f4cf4124e target: Add new methods for read/write individual regs. 2019-09-01 20:38:38 +02:00
Uwe Bonnes
d39dc34382 pc-stlinkv2: Fix reg_read|write
- Fix wrong placed brace in cortexm_regs_write()
- Start writing with r0
- With register read, save only registers listed
2019-09-01 12:11:37 +02:00
Uwe Bonnes
aef055bb6f adiv5: If setup AP0 fails, fail immediate. 2019-08-31 11:20:17 +02:00
Uwe Bonnes
6bf4fd3598 pc-stlinkv2: CPU register read and write must be done with the AP set.
FIXME: Writing CPU registers on M4 of STM32H745 seems not to work.
2019-08-27 15:13:15 +02:00
Sylvain Munaut
4289788e0b src: Replace sprintf with snprintf
snprintf is needed anyway, that's one less function to have :p
And it's bad practice anyway.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2019-08-05 15:43:33 +02:00
Sylvain Munaut
1d4152a36f target: Make sure variant_string is consistent in size
It's a global symbol and LTO will complain if the one in this file and
the one in EFM32 target are inconsistent.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2019-08-05 15:42:29 +02:00
Uwe Bonnes
e29f2b4fb9 jtag/swd: Rename defines/make variables to allow removal of weak attribute
jtagtap.c is libopencm3 generic. Move to common.
2019-07-18 20:54:10 +02:00
Uwe Bonnes
067956266c Adiv5: Remove weak attribute to ease windows compile. 2019-07-18 18:16:19 +02:00
Uwe Bonnes
9e898cc4b8 adiv5: Add more coresight part numbers found on STM32MP157c-DK2 (#492).
Only print corename if not NULL.
2019-07-18 17:39:48 +02:00
Uwe Bonnes
dd3cb193f3 Indicate the Core in the Target list. 2019-07-17 17:38:21 +02:00
Uwe Bonnes
c44cb904b0 adiv5.c: Format debug output more tense. 2019-07-17 17:38:21 +02:00
Uwe Bonnes
634c07c432 adiv5: Add TSGEN. 2019-07-17 17:38:21 +02:00
Uwe Bonnes
9ed26645d3 Add pc_stlinkv2 platform, running on host, talking to original StlinkV2/3.
Stlink firmware needs to be recent.
2019-07-17 17:38:01 +02:00
Uwe Bonnes
32d2b2c4bf jtag: Move device list to it's own file to allow reuse. 2019-07-17 17:26:00 +02:00
Uwe Bonnes
bd530c8951 adiv5.c: Make functions weak where high level platforms may implement different. 2019-07-17 17:26:00 +02:00
Stephen Roe
b4c680bb15 Add STM32G4
Based on #488 Stephen Roe, done as #491.
Fixes ID of STM32G03.
2019-07-17 17:24:23 +02:00
Simon Rasmussen
5a7ffe7a40 Fixed SAM3X8C large file flashing.
The datasheet specifies the EEFC_BASE(0) is at `0x400E0A00` and EEFC_BASE(1) is at `0x400E0C00` which means they're spaced 0x200 bytes apart rather than 0x400.
2019-07-17 14:37:07 +02:00
David R. Piegdon
02b2fdb2ae fix overwriting of still-needed value (refs #487)
this fixes a bug that was introduced in blackmagic PR #475 which lead to
firmware crashes when connecting to a BMP more than once without a
power-cycle.
2019-06-24 16:45:18 +02:00
Uwe Bonnes
589d297d20 stm32l0: Fix crash when only "monitor option" was requested.
PR #485
2019-06-12 12:54:29 +02:00
Richard Meadows
600bc9f029 Generate DEBUG warnings and return if malloc/calloc fail.
This is will make debugging earier if this does happen, rather than
dereferencing the null pointer (or passing it to memcpy, or worse).

blackmagic PR #475
2019-05-26 18:56:12 +02:00
Richard Meadows
61e9607594 [adiv5] Improvements in ADIv5
* Reference latest version of the ARM specification
* ROM tables - more debug information, including printing SYSMEM bit
* MEM-AP - reject when Debug Base Address entry is not
  present/invalid. These would only have errored in
  adiv5_component_probe.
* Fix maximum number of entries in Class 0x1 ROM Table to 960. See ARM
  IHI 0031E Table D3-1 ROM Table register summary.
* Resolve note in STM32H7 driver with explaination

blackmagic PR #474
2019-05-24 22:00:44 +02:00
Richard Meadows
24a7b8b2bf [stm32h7] add revision command which reads the DBGMCU_IDC register
blackmagic PR #476
2019-05-21 23:20:13 +02:00
Richard Meadows
c336c300a3 [stm32h7,bugfix] Fix bug: target_add_flash called in attach
When `target_add_flash` or `target_add_ram` are called in an attach
function they may be added multiple times. This very much confuses
GDB. This issue has already been reported and fixed for `stm32l4` (See
Issue #455 ).

`stm32f4` and `stm32l4` are the only other cortexm drivers that
implement this pattern. These are both fine.
2019-05-21 22:38:16 +02:00
Uwe Bonnes
984813a29d Add Stm32G03 from reference manual Rev.2
Not yet tested on a real part.
2019-04-24 12:29:58 +02:00
UweBonnes
302ff20a6d
Merge pull request #434 from UweBonnes/nrf5
Nrf5
2019-03-21 19:43:29 +01:00
Jeremy Elson
3235fa2005 Improve parsing of commands that require enable or disable arguments:
* Accept prefixes of the words 'enable' and 'disable'
* Prevent silent failures on parse errors
* Print status after flag changes
* Fix missing includes
2019-03-19 12:56:44 -07:00
Boris Sorochkin
691ada17e9 Implement read device info for NRF5x 2019-03-10 21:45:47 +01:00
Uwe Bonnes
3f89fed32e nrf51: Use buffered direct write to flash. 2019-03-10 21:45:47 +01:00
Uwe Bonnes
4ecd13a9a3 nrf51: Fix crash with not argument given to "mon read". 2019-03-10 21:45:47 +01:00
Uwe Bonnes
db2f403417 sam4l: Remove noisy debug message. 2019-03-10 21:45:47 +01:00
Uwe Bonnes
a336ac2084 NRF5: New detection scheme. 2019-03-10 21:45:47 +01:00
newbrain
6887628eaa Correction of #445 attach-detach problem
Memory map is now completely freed and rebuilt in the separate attach
function.
It was previoulsy split beween probe and attach and never released,
causing problems when reattaching to the same target.
2019-03-03 15:55:40 +01:00
UweBonnes
da62cbaa3d
Merge pull request #449 from jelson/width-fix
Use 32-bit variable for 32-bit read
2019-02-25 13:21:55 +01:00
Jeremy Elson
86ed86c2a2 Use 32-bit variable for 32-bit read. (Also fixes DEBUG compile
error due to mismatch of format and argument.)
2019-02-24 17:49:30 -08:00
Uwe Bonnes
56fb0f7766 Handle STM32F730 and STM32H750.
Flash sector calculation was wrong with small flash sizes.
2019-02-21 19:19:10 +01:00
anyn99
3f8c40d3f5 Fixing stm32l4 target to allow probing w/o halting 2019-02-21 18:06:38 +01:00
newbrain
8de1b45c85 Kinetis KE04: Flash and debug support
Support for Kinetis KE04 8KiB, 64KiB and 128KiB variants in nxpke04.c
Target monitor commands for sector and mass erase.
Changes to kinetis.c MDM-AP target to support KE04.
Only KE04Z8 tested in HW.
2019-02-17 22:48:23 +01:00
Carl
02c1934c03 Added ability to lock and unlock boot rom for samd controllers 2019-02-13 16:33:07 -08:00