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212 Commits

Author SHA1 Message Date
Richard Meadows
0b28232f72 [efm32] Assume Device Identification (DI) version 1 if we don't know the OUI (#402) 
* [efm32] Assume Device Identification (DI) version 1 if we don't know the OUI

Silabs are using some additional OUIs we don't know about. Reported in issue #389
These should use a DI version 1 layout, so assume version 1 layout for OUIs we don't
know. However do print a notice about this on DEBUG() as suggested by @UweBonnes

The IDCODE value is sufficient to make a positive identification of an EFM32 device.
See AN0062 Section 2.2. Therefore accepting any OUI is reasonable behaviour.
Additionally the part familiy is checked, and the target rejected if not in the
`efm32_devices` table. This commit makes that rejection explicit, although it does
not change the logical behaviour here.

Note that the important registers (part number, part family, flash size) are at the
same addresses in both layouts anyhow. Currently only `efm32_cmd_serial` and
`efm32_cmd_efm_info` functions use registers that differ between DI versions.

* [efm32] tidy format warning about portability UB

* [efm32] Simplify OUI checking

* Only read the OUI once
* Accept the device even if the OU is unknown, as silabs have been using
  a variety of OUIs
* Perform fewer register reads before checking the device family is valid
 2019-01-16 09:58:59 +13:00
Uwe Bonnes
7cc02867ae stm32f4: Fix problems with small flash sizes creating overflow or empty regions. 
Thanks to "DerMeisteRR" for pointing out.
 2019-01-09 12:23:49 +01:00
Uwe Bonnes
47fad2bf7f Add Stm32L41x. 2019-01-09 12:23:49 +01:00
Uwe Bonnes
f0c6e2bbd2 Add STM32G07x. 2019-01-09 12:23:49 +01:00
Uwe Bonnes
0793dac2cf libftdi: Allow to compile with mingw and cygwin and use recent libftdi1. 
Tested with x86_64-w64-mingw32-gcc-8.2.0 and cygwin gcc (GCC) 7.3.0.
Use libftdi1 unconditionally.
Try to convice github travis to use libftdi1.
Remove unportable "uint ". Thanks to jacereda for pointing out in #400.
 2019-01-07 15:31:57 +01:00
Ingmar Jager
3f0c9ccee1 Fix support for LPC1115 and LPC1115XL devices (#415) 
* Add support for LPC11U3X devices.

The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.

* Fix support for LPC1115 and LPC1115XL devices

* Fix whitespace
 2019-01-07 13:34:00 +13:00
Josh Robson Chase
02b9d5f1ac Add delay to cortexm_reset 2019-01-07 13:32:17 +13:00
Josh Robson Chase
d7e2923990 Debug on stm32f1_flash_erase errors 2019-01-07 13:32:17 +13:00
Uwe Bonnes
9ce05ae67b stm32h7/f7: Store DBGMCU_CR on attach() and restore on detach(). 
On STM32[FH]7, DBG_SLEEP must be set for debugging.
 2019-01-07 13:22:01 +13:00
Uwe Bonnes
8d6092b73f cortexm_forced_halt: Only release SRST after "Halt on reset" command. 
This should make life easier if program remaps JTAG/SWD pins so that
with program running, JTAG/SWD access is impossible.
 2019-01-07 13:22:01 +13:00
Uwe Bonnes
3ebf049424 cortexm: Only force halt before probe if idcode is unknown and ROM TABLE unreadable. 2019-01-07 13:22:01 +13:00
Uwe Bonnes
6633f74d95 stm32h7/f7: Write DBGMCU_CR only on attach. 
Split probe/attach for STM32H7.
 2019-01-07 13:22:01 +13:00
Uwe Bonnes
8575d3e7a6 stm32f7/h7: Use the DPv2 provided idcode for MCU identification. 2019-01-07 13:22:01 +13:00
Uwe Bonnes
525b90d4e5 cortexm: Only force halt before probe() if probe was forced. 2019-01-07 13:22:01 +13:00
Uwe Bonnes
da75acf015 adiv5: Only force cortexm_probe() once. 2019-01-07 13:22:01 +13:00
Uwe Bonnes
489f24584b adiv5: Read TARGETID on DPv2 devices. 2019-01-07 13:22:01 +13:00
Uwe Bonnes
cde7726b87 cortexm: detach still needs extra cycles. 2019-01-07 13:22:01 +13:00
Ingmar Jager
14bedcc441 Add support for LPC11U3X devices. 
The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.
 2018-10-04 08:53:05 -07:00
Mark Rages
91dd879dac Another nRF52 ID. 2018-09-13 16:18:29 -06:00
Uwe Bonnes
f5cf6d4497 adiv5_swdp: Add extra idle cycles with write transactions. 
These extra cycles are needed by some CPU, e.g. STM32L0x1 to cross the SWCLK
/HCLK domains. Revert insufficient #373 also tackling that problem.

Thanks to Thorsten von Eicken for pointing out.
 2018-09-06 17:29:20 +02:00
Rik van der Heijden
f39701c4c8 Move the LPC17xx probe function down since it performs an IAP call which can hang when performed on other devices than a LPC17xx 2018-09-05 17:40:02 +02:00
Gareth McMullin
c5c0783337
Merge pull request #378 from markrages/nordic_unlock 
Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set.
 2018-07-28 14:56:03 +12:00
Mark Rages
d0a8ce0819 Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set. 
Mostly copied from the equivalent in kinetis.c and
https://devzone.nordicsemi.com/f/nordic-q-a/12484/approtect-and-dap/47301
 2018-07-27 16:07:19 -06:00
Gareth McMullin
6fd3ede5c7
Merge pull request #377 from markrages/add_id_2 
Another chip ID for Nordic nRF52832.
 2018-07-28 09:53:00 +12:00
Mark Rages
cb8596b0b2 Another chip ID for Nordic nRF52832. 2018-07-27 15:09:14 -06:00
Uwe Bonnes
5918608156 STM32F7: Debug does not work with WFI without DBG_SLEEP 2018-07-27 10:59:54 +02:00
Uwe Bonnes
2c1c913213 adiv5.c: Add units found on M7. 2018-07-27 10:59:54 +02:00
Uwe Bonnes
f234074099 stm32h7: Start of support. 
Implement probe, memory map, erase, write, uid, crc, parallelism.
 2018-07-27 10:59:54 +02:00
Gareth McMullin
a988bba035
Merge pull request #372 from richardeoin/efm32-1 
[efm32] Add support for EFM32 devices with different DI and MSC layouts
 2018-07-27 11:41:58 +12:00
Gareth McMullin
d7b173ab39
Merge pull request #310 from UweBonnes/stm32l4r 
arget/stm32l4.c: Add stm32l4r series and clean up.
 2018-07-27 10:32:00 +12:00
Mike Walters
b4dc666aca Add nRF52 QIAA C0 2018-07-26 23:13:38 +01:00
Uwe Bonnes
4a312c7697 target/stm32l4.c: Add stm32l4r series and clean up. 2018-07-22 15:44:00 +02:00
Uwe Bonnes
7034d0bb94 stm32l4: Option byte loader must be started with flash unlocked! 
Warn user that device will loose connection.
 2018-07-22 15:44:00 +02:00
Uwe Bonnes
83f9655f6e stm32l4: Fix wrong default for WRP2A option halfword. 2018-07-22 15:44:00 +02:00
Uwe Bonnes
139707c5c0 cortexm/detach: Add a dummy transaction after cleaning DHCSR. 
This replaces the seemingly superflous swdptap_seq_out() at
the end of adiv5_swdp_low_access() needed to continue after detach.
 2018-07-19 10:57:41 +02:00
Richard Meadows
a7106bd346 [efm32] Add support for flashing User Data (UD) and Bootloader (BL) regions 
* UD region on all devices, some devices also have BL region
* Fix page size for EZR32HG
 2018-07-18 08:57:01 +00:00
Richard Meadows
55bb96cfdb [efm32] tidy compiler warning 2018-07-16 20:47:24 +00:00
Richard Meadows
98faaceb70 [efm32] Add support for EFM32 devices with different DI and MSC layouts 
* DI layout is identified by attempting to read OUI from both layouts
* MSC address is passed to flashstub in r3

Retested EZR32LG230 (EZR Leopard Gecko M3)
Tested EFR32BG13P532F512GM32 (EFR Blue Gecko)

Achieves aims of PR #264 (I think) Thanks to @dholth and @ryankurte for inspiration
Fixes Issue #226
 2018-07-16 20:18:36 +00:00
Antti Louko
59d6eca8f0 Fixes option erase for STM32F070x6 STM32F070xB STM32F030xC 2018-07-10 18:44:05 +03:00
Gareth McMullin
c5713ea8d3
Merge pull request #366 from UweBonnes/f7_fix 
stm32f4.c: F76x also has large sector by default.
 2018-07-07 13:03:14 +12:00
Gareth McMullin
1b51c4961e
Merge pull request #363 from korken89/master 
Removed debug bits for F4/F7 target, same as all other MCUs now
 2018-07-07 13:01:05 +12:00
Uwe Bonnes
50514ccc31 stm32f4.c: F76x also has large sector by default. 2018-07-05 13:29:43 +02:00
Emil Fresk
5e8c8cae10 Removed debug bits for F4/F7 target, same as all other MCUs now 2018-06-28 16:31:34 +02:00
Uwe Bonnes
5548d54626 common/swdptap: some clean up. 
Remove superfluous transaction.
Use native variable size.
 2018-06-26 19:50:14 +02:00
Uwe Bonnes
7e3fe352ad adiv5_swdp.c: Use swdptap_seq_out for initialiation sequence. 2018-06-26 19:50:14 +02:00
Gareth McMullin
b2defad844
Merge pull request #356 from UweBonnes/probe_halted 
Probe halted
 2018-06-21 10:06:56 -07:00
Uwe Bonnes
b59bbac0b2 stm32l4: Use buffered direct write to flash. 2018-06-16 13:30:53 +02:00
Uwe Bonnes
891d6de8eb stm32f1.c: Use buffered direct write to flash with half word access. 2018-06-16 13:30:53 +02:00
Uwe Bonnes
f1752c7a1a stm32f4: Allow DWORD parallelism. 
Needs external VPP!
 2018-06-16 13:30:53 +02:00
Uwe Bonnes
15312eb86c stm32f4: Honor parallelism also for erase. 2018-06-16 13:30:53 +02:00