F09x and L4 share the same cselr register, as well as some L0s, factorize
definitions in a new shared header and add helpers.
fyi, that register allows to redefine dma channel peripheral mapping - see
device datasheet for mapping tables.
You can't have two mainpage items, and the second was just being
ignored. This restores them, which makes the left side list longer,
which we may or may not like, but it's at least how it was documented to
be.
According to RM0351 and RM0394 flash needs to be programmed by double words.
Also fix flash_program() which was wrong anyways.
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Make the names match the reference manuals properly, and add missing
names. Still a long way to go to unify across all families, but this is
at least closer.
While on all current chips, exticr gpio port mux selection is coded on 4 bits,
stm32g0 EXTI_EXTICR register uses 8 bits. Align all exti header to reference
that value (was previously defined for f0 as SYCFG_EXTICR_SKIP)
I2C3 is on many parts, but wasn't properly supported with the register
definitions. Declare them centrally, just depending on the memorymap
defining them. On some parts, the rcc bits were defined, but not the
base registers.
Fixes: https://github.com/libopencm3/libopencm3/issues/820
flash_clear_pgperr_flag is a name used on f247, which is actually most
analogous to the SIZERR bit on l4, (it's a parallelism error)
the bit being cleared originally in this function, PROGERR is a new bit,
and should have it's own name.
Add a function to handle the previously unhandled size/parallelism flag,
and rename the existing one to properly reflect it's new name.
l4 is pages, not sectors, so update apis to be consistent. (other
families use page/sector as defined in the reference manual)
Make sure that pages on the second bank can also be erased. Use the
same style in use for f2/4/7 for sector numbers across banks.
All the "f" type flash parts have an EOP flag, even if it's in different
bit positions. Add a header for this common functionality, and move
it's implementation to the existing common file.
Turns out, there's lots of common code for flash. Pull up prefetch
on/off to start with, as there's only a single bit name different.
Pull up the definitions of common API functions too, starting with
flash_set_ws. Even if the implementations are different, things that
meant to be the same, should be defined centrally.
Only applied to STM32 doc trees at present.
Instead of declaring a group for "STM32blah" in the doc-blah.h files,
and then trying to put all the common+specific peripheral code into
those groups, (which is what led to the stub doxygen holder empty .c
files) Just use a standard name like "Peripheral APIS" and place
everything into that.
Demonstrated by converting ADC and USART peripherals, which is
definitely not complete, but it shows how to make things less magical,
and less prone to copy/paste errors. Now, you can copy/paste and it
will do the right thing, because everyone uses the same group names.
This is also how to unify the mix of "STM32blah->Periphblah" and _also_
the dangling "periph_file" modules in doxygen, it merges them together
properly, as they're intended to be really.
split spi stuff in three part:
- v1 : basic spi peripheral
- v1_frf : v1 spi with frf mode additional bit in spi_cr2 / spi_sr
- v2 : spi with variable datasize, fifo and other fancy stuff.
v1 maps to f1 chips
v1_frf to f2, f4 and l0,l1
v2 to f0, f3 and l4
This breaks spi_master_init API for v2 devices : function prototype from
common spi header used to be abused, with DFF bit reused for CRCL bit.
New v2 spi_master_init does not handle anymore CRCL bits, as it does not
usually mess with other crc configuration.
stm32f0, l3, l4 are currently sharing the same duplicated header, and
stm32l0 uses the same peripheral. Stop copy-pasting stuff and centralize
definitions into a iwdg_common_v2.h header.
rcc_osc_bypass_enable and rcc_osc_bypass_disable have been copy/pasted
around for the last time! There's a compile bit to check for L0/L1, but
otherwise this is just code duplication for no gain.
Originally suggested in https://github.com/libopencm3/libopencm3/pull/399
At least provide macros for each family that allows easy masking of the
full set of reset reason flags. Trying to provide a function that
provides these in random upper bits seems unclear at best.
According to reference manuals both l0 and l4 have "v2" i2c peripheral.
This patch adds i2c support to l0 and l4 using previously unified "v2" i2c
headers and implementation.
No real hardware has been tested so far. Only compilation tests for both
libopencm3 and libopencm3-examples for all stm32 families.
Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
