1896 Commits

Author SHA1 Message Date
Daniel Thompson
e3b8adec10 usb: Support for MIDI class devices
Provides all of the config descriptors for MIDI class devices together
with a sub-set of the audio class sufficient to put together a full
fledged MIDI device.
2014-12-18 22:50:27 +00:00
Daniel Thompson
d3aa579e0a usb: Support for class specific endpoint descriptors.
Extends struct usb_endpoint_descriptor to make it possible to provide
the USB host with class-specific extensions to endpoint descriptors.

The approach taken, based on extra and extralen and removing the sizeof()
from USB_DT_ENDPOINT_SIZE, is identical to the approach used to add
class-specific extensions to interface descriptors. All libopencm3-examples
use the USB_DT_ENDPOINT_SIZE (rather than directly using sizeof) so there
should be no compatibility problems resulting from this change.
2014-12-18 22:50:27 +00:00
Daniel Thompson
0b63408260 usb: Prevent memcpy() being called with NULL arguments
If there is no additional iface data then iface->extra is NULL and
iface->extralen is zero. Passing NULL to memcpy is undefined behaviour
even if the length of data to copy is zero. In other words a conforming
(debug) memcpy implementation is permitted to assert(dst && src) without
checking the value of n.

Add an extra branch to avoid this.
2014-12-18 22:50:27 +00:00
Kuldeep Singh Dhaka
342ec6e9e3 [STM32F0] Add support functions for USB clock setup in F072 chips.
There is remaining an issue with PREDIV connected just after clock multiplexer (only F072). This should be fixed in another commit.
2014-12-18 23:43:04 +01:00
Kuldeep Singh Dhaka
331acce4fc [STM32F0] add support of autotrimming HSI to USB SOF frames
Signed-off-by: Frantisek Burian <BuFran@seznam.cz>
2014-12-18 23:43:04 +01:00
Karl Palsson
3974e5f48d ethernet: mac stm32fxx7: Fix style and docs
Rushed commits are bad mkay :)
2014-12-18 22:00:03 +00:00
Frantisek Burian
cf6d8d7235 [fix] after phyid addition, the init function should init correct phy. 2014-12-18 21:26:59 +01:00
brabo
bb8980efc6 [ETH] Make support of ethernet for F1 family 2014-12-17 23:58:55 +01:00
brabo
9cced2c0b4 [ETH] Phy ID configurable as parameter 2014-12-17 23:40:06 +01:00
Karl Palsson
c09d2583dd stm32: f4: Add FLASH_OPTCR1 definition
This is required for stm32f42xx and stm32f43xx with second bank options.
2014-12-17 17:26:25 +00:00
Chuck McManis
14ad92015e Audit RTCPRE Shift and Mask Values
L0 - RTC Prescaler appears in RCC_CR, bit 20, 2 bits wide (RM0367 Rev 2)
L1 - RTC Prescaler appears in RCC_CR, bit 29, 2 bits wide (RM0038 Rev 10)
F0 - no prescaler setting (RM0091 Rev 7)
F1 - no prescaler setting (RM0041 Rev 4)
F2 - RTC Prescaler appears at RCC_CFGR, bit 16, 4 bits wide (RM0033 Rev 6)
F3 - no prescaler setting (RM0316 Rev 3)
F4 - RTC Prescaler appears at RCC_CFGR, bit 16, 4 bits wide (RM0090 Rev 8)
2014-12-14 16:29:03 -08:00
Chuck McManis
9ddfcb0e53 Rename rcc_ppre1_frequency and rcc_ppre2_frequency
Rename rcc_ppre1_frequency and rcc_ppre2_frequency to rcc_apb1_frequency and rcc_apb2_frequency
Also add rcc_ahb_frequency (although it is not set correctly in all cases) which will be fixed by
the rcc commits later. Also fixup the only use in the library of these variables, the USART code.

And fix the typos that resulted
Make l1 generic too
2014-12-13 19:49:04 -08:00
brabo
2429159203 ethernet: corrected typo in ethernet/phy_ksz8051mll.c to include setting the speed to 100M in case of 100M Half Duplex 2014-12-14 00:11:51 +01:00
Oliver Meier
f52a39cc48 [cm3/sync] mutex_lock now calls mutex_trylock repeatedly 2014-12-11 09:59:22 +00:00
Oliver Meier
a2fe6c49a8 [cm3/sync] Add mutex_trylock()
Allows non-blocking use in user code.
2014-12-11 09:58:34 +00:00
Daniel Thompson
ad937e00fd stm32/desig: include in f4 library
The code is all there and working but simply isn't being built.
2014-12-07 12:47:19 +01:00
Karl Palsson
5c18dee500 .gitignore correct netbeans project directories 2014-12-05 21:28:52 +00:00
Chuck McManis
99f83eedcd stm32/f0: rcc.c Use common version instead of duplicate code.
Pulls out duplicate calls from f0/rcc.c and uses the common version which
also means that f0 can use rcc_peripheral_enable() now which is in common
but not the old rcc versions.
2014-12-03 11:14:26 +00:00
Karl Palsson
f51698fff4 stm32:l0: RCC: add osc_on/osc_off helpers
These are the routines that have custom switch cases, and aren't easy targets
for pulling out.
2014-12-03 11:13:39 +00:00
Karl Palsson
160a644bc6 stm32:l0: Add linker script / memory sizes
Easier to pick a corresponding part.
2014-12-03 11:13:39 +00:00
Karl Palsson
378069091a stm32:l0: Add RCC register definitions
Tested with a miniblink example on the l053 discovery board.

Only register definitions at this stage, no helpers.
Register definitions from RM0367r2, hopefully the biggest
superset of L0 parts.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2014-12-03 11:13:39 +00:00
Chuck McManis
0ca7123fe6 .gitignore cscope database files 2014-11-24 00:24:37 +00:00
Karl Palsson
3a44b1311b stm32: f1: Additional GPIO Remappings for F100
F100 has more remap options than F10x, particularly on the High Density
devices.

Fixes github issue #365

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2014-11-21 10:38:03 +00:00
Karl Palsson
2c475a38d5 stm32:l0: Correctly compile as m0+, not m0.
Committed to binutils back in 2012, so even though it has no real impact, it at
least does the right thing for future compilers to make better decisions.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2014-11-18 21:50:10 +00:00
Karl Palsson
fb95997b3b stm32f1: rcc: timer 15,16,27 rcc bits missing for old style
The bits definitions for direct manipulation were missing, and should be
present for completeness.  However, this only affects the legacy (error prone)
API, replaced some time ago.

old and error prone: (stop using code like this)
    rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_TIM16EN);
    rcc_peripheral_reset(&RCC_APB2RSTR, RCC_APB2RSTR_TIM16RST);

new:
    rcc_periph_clock_enable(RCC_TIM16);
    rcc_periph_reset_{pulse,hold,release}(RCC_TIM16);

Fixes github issue #361
2014-11-14 22:32:49 +00:00
Silvio Gissi
1420be5577 lpc17xx: power: basic peripheral power functions and defns 2014-10-27 22:05:36 +00:00
Silvio Gissi
ff8e2743e8 lpc17xx: clock: Add basic clock control definitions 2014-10-27 22:05:30 +00:00
Silvio Gissi
91dca33789 lpc17xx: memorymap: Add APB1 peripherals 2014-10-27 22:05:23 +00:00
Silvio Gissi
f44a8cf696 lpc17xx: memorymap: Add GPIO block at correct location 2014-10-27 22:05:16 +00:00
Silvio Gissi
fe52894cf4 lpc17xx: memorymap: Fix AHB address and add peripherals 2014-10-27 22:05:08 +00:00
Silvio Gissi
9a79e6036e lpc17xx: trivial: fix description in linker script. 2014-10-27 22:04:54 +00:00
Karl Palsson
5dc9662e60 Update README with recently added targets 2014-10-21 14:54:08 +00:00
Frantisek Burian
9fce73a014 [Doxygen] Strip out architectures from Makefile dependencies
This commit shrinks the Makefile of the doxygen and makes easy error-prone addition of the new supported platforms.
The user should modify only one line at start of file to add new supported family to the build process.

The calling format is preserved and is compatible with old version of the makefile.
2014-10-15 19:50:08 +02:00
Frantisek Burian
eee5a45019 [stm32l0] Integrate the L0 architecture to the doxygen documentation
Conflicts:
	doc/Makefile
2014-10-15 19:33:20 +02:00
Frantisek Burian
f9152eb00a [stm32l0] Initial support for STM32L0 architecture, Add GPIO peripheral 2014-10-15 19:31:41 +02:00
Stefan Agner
7cef59a83f vf6xx: add I/O mux controller
Add I/O mux controller which is required to mux pins according to
their used function. For all pads, the alternative function 0 is
GPIO. For different pin mux function refer to the reference manual.
2014-10-15 19:31:09 +02:00
Stefan Agner
2e1cbcae22 vf6xx: initial GPIO support
This adds GPIO module support. GPIO can be controlled using the GPIO
number as stated in the reference manual, similar to Linux. Also
32-bit access to whole ports is possible. Reading a GPIO is possible
without muxing the pad as GPIO, however writing a GPIO needs the pad
to be muxed as GPIO.
2014-10-15 19:31:09 +02:00
Stefan Agner
a1d456521d vf6xx: add UART support
This adds UART support for Vybrid VF6xx. Baud rate is calculated
from IPG clock, which need to be initialized by using the
ccm_calculate_clocks functions. Also clock need to be gated using
the ccm_clock_gate_enable function. Tested with an unitialized
UART with a baud rate of 115200.
2014-10-15 19:31:02 +02:00
Stefan Agner
c9857ad52a vf6xx: calculate core clocks
Extend the clock controller module with a function to calculate
core clocks from the current registers settings. On Vybrid, we
assume that the core clocks are setup by the main operating system
running on the Cortex-A5. Nevertheless we need to know their actual
values in order to calculate other clocks or baud rates.

Verified on a Colibri VF61, which calculates following values:
ccm_core_clk: 500210526
ccm_platform_bus_clk: 166736842
ccm_ipg_bus_clk: 83368421
2014-10-15 19:31:02 +02:00
Stefan Agner
511f16e8c7 vf6xx: enable floating-point coprocessor 2014-10-15 19:31:02 +02:00
Stefan Agner
c83e16926e vf6xx: doc: initial commit
Add documentation Makefile and DoxygenLayout for Freescale Vybrid
VF6xx support.
2014-10-15 19:31:02 +02:00
Stefan Agner
3132ae50cb vf6xx: initial memorymap and clock control module
Add initial memorymap for Vybrid VF6xx module. Also add the clock
control module which allows to control system clocks and enable
clocks of individual pheripherials.
2014-10-15 19:31:02 +02:00
Stefan Agner
cc2dc243e5 vf6xx: set vector table to memory
Set Vector Table Offset to memory location of our vector table.
Since we put the whole programm including the vector table into
memory, we need to make use of the Cortex-M4 system control block
Vector Table Offset Register (VTOR).
2014-10-15 19:31:02 +02:00
Stefan Agner
07b7d3e805 vf6xx: initial add of Vybrid VF6xx support
Freescale Vybrid is a familiy of ARM SoC, wheras the VF6xx models
have two cores in one SoC, a Cortex-A5 and a Cortex-M4. This adds
initial support for the Cortex-M4 in the libopencm3 library.

By using two different ram areas (pc_ram and ps_ram) the user can
put the code in a RAM area bounded to the code bus. The data can
be stored in the data area. However, currently the initial values
of for the variables in the data section are stored in the code
section and copied to the ram section by the initialization code
(like it's copied from ROM to RAM on microcontrollers).
2014-10-15 19:31:01 +02:00
Enrico Jorns
cd6b997a67 Markdowned README.md 2014-10-15 17:30:27 +02:00
Enrico Jorns
116462ca45 Renamed README to README.md to be recognized as Markdown by GitHub 2014-10-15 17:30:27 +02:00
Freek van Tienen
ac8ac8c64d [f4] Added a 25mhz clock 2014-10-15 17:27:18 +02:00
Karl Palsson
67f4f50a94 stm32: common: fix missing SPI_I2S_BASE rename regression
Fix regresion from 5d4437fe43aa68a28611e9a0aecc712833230304 where
somehow not all occurrences were replaced.  I could swear it all
compiled when I was working on it :(

Reported-by: Trevor Woerner <trevor.woerner@linaro.org>
2014-10-08 14:32:05 +00:00
Michael Spieler
50dd1c5725 stm32: gpio_toggle: ensure correct state of non-toggled pins. 2014-10-07 12:01:04 +00:00
Stefan Agner
0d5dac515a init: call pre_main before C++ constructors
This moves the platform specific initialization function pre_main
in front of C++ constructors. This is especially necessary for
platforms which need to setup the stack pointer (pre_main itself
is inline, hence no stack needed for this function).
2014-10-07 11:31:36 +00:00