This was also fixed in ac29b654a992a4855626fc0b92874d3847914f85 in a
different way. I think the mask definition should be left with 1s
indicating the bits of interest.
This reverts commit e11185d47d0a2fea6d2782761edd5fd489541512.
- Rename SPI_CR2_FRF_TI to SPI_CR2_FRF_TI_MODE to match datasheet.
- Rename SPI_CR2_FRF_MOTOROLA to SPI_CR2_FRF_MOTOROLA_MODE (see above).
- Fix SPI_CR2_FRF_MOTOROLA_MODE bit definition, must be (0 << 4).
- Change SPI_SR_RXNE to SPI_SR_TIFRFE; this was probably a copy-paste
error. Also, the bit definition is (1 << 8).