72 Commits

Author SHA1 Message Date
Karl Palsson
da91794f52 stm32: rcc: Rationalize MCO definitions
Some parts used HSICLK, some used HSI.  Most used NOCLK, f3 used
DISABLED.  Try and move all to the shorter, simpler forms, instead of
having mixed defines for different targets for the same thing.  Just
because the bits themselves are different doesn't mean we should make it
more difficult for users to port code.
2016-11-29 15:06:19 +00:00
Karl Palsson
29602c94c1 stm32l4: rcc: Fix MCO Prescaler shift
Transcription error from ref manual I presume.
2016-11-29 14:56:57 +00:00
Karl Palsson
08aac020ad stm32: rcc: provide async routines for osc checks
Start providing async routines for all blocking routines, to make it
easier to use libopencm3 in some RTOS environments.  This is not in
anyway intended to be complete, this just covers a single blocking
routine, rcc_wait_for_osc_ready.  Documentation added to the top level,
and provided for all stm32 families.
2016-08-18 23:41:04 +00:00
Karl Palsson
4eb51ecaea stm32: rcc: rcc_wait_for_osc_ready is always available
Move the prototype to the common_all header and include documentation.
2016-08-18 23:41:04 +00:00
Karl Palsson
0b84540ecb stm32l4: add common timer code. 2016-03-30 16:59:57 +00:00
benjaminlevine
69a3ba6e2a stm32l4: flash: support basic core operations
Heavily reformatted by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2016-03-30 16:59:57 +00:00
Karl Palsson
c5b00c3dda stm32l4: rcc: MSI range handling 2016-03-30 16:59:57 +00:00
Karl Palsson
97d644c4d3 stm32l4: rcc: Add core functions
Based on STM32L1, and rather a lot of duplication unfortunately.
2016-03-30 16:59:57 +00:00
Karl Palsson
b69916837e stm32l4: rcc: missing pllp definitions
These are important for implementing the PLL helper functions.
2016-03-30 16:59:57 +00:00
Karl Palsson
9047b8c5f4 stm32l4: rcc: correct register name
Use the same name as the reference manual and the same name as other parts.
2016-03-30 16:59:57 +00:00
benjaminlevine
d60fd7ca94 stm32l4: pwr: basic core functionality
Only support for voltage range setting.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2016-03-30 16:59:57 +00:00
benjaminlevine
326899b05b stm32l4: pwr: include register definitions.
Reviewed and edited for consistency.
2016-03-30 16:59:57 +00:00
Karl Palsson
c56bed6e1a stm32l4: Add header base for doxygen 2016-03-30 16:59:57 +00:00
Karl Palsson
04e784d332 stm32l4: gpio: fix doxygen markers
Reported-by: @benjaminlevine
2016-03-30 16:59:57 +00:00
Karl Palsson
0e40d6da02 stm32l4: gpio: Correct ASCR name to match ref manual
Be consistent, not sure why I left off the R originally.
2016-03-30 16:59:57 +00:00
Karl Palsson
1755098617 stm32: adc-v2: pull up voltage regulator control.
L4 and F3 actually have the same bits to write in the same order, but F3 hides
the name of the deep power down bit.  Keep the like that for now, but there's a
standard API for enabling and disabling the regulator.
2016-03-30 16:59:56 +00:00
Karl Palsson
697c975dde stm32l4: adc: Initial support for the adc-v2 periph
Now that there's an adc-v2 peripheral layer, we can just use it straight away
for L4.
2016-03-30 16:59:56 +00:00
Karl Palsson
20e1ee174d stm32l4: rcc: fix typo in RCC_CR_CSSON bit define
Reported by @benjaminlevine
2016-03-06 23:26:05 +00:00
Piotr Esden-Tempski
b1049f9a6f [Style] Stylefix sweep over the whole codebase. 2015-12-14 22:57:15 +01:00
Karl Palsson
f14c678ccb stm32l4: add gpio support
Just the basic core common functionality gained for free by being a common
peripheral.  Enough for a miniblink.

Fixes some errors in the GPIO memory map.  ST's naming of AHB2 vs AHB3 is
confusing.
2015-11-13 02:13:31 +00:00
Karl Palsson
8afc983f3e stm32l4: Add RCC definitions
Bring in the core common code, and now that it's used, pull in the common
memorymap
2015-11-13 01:15:17 +00:00
Karl Palsson
507c184456 stm32l4: initial memorymap and vector support
Values from RM0351rev1, with the correction of the duplicate TIM1_CC entry.

Only stub support so far, but this opens up the beginning of build testing.
2015-11-10 23:47:57 +00:00