the LM3S irq list was previously unused as it was missing in the
dispatch files; now it got added. (before HEAD^, it wouldn't have made
any difference because the discriminating constant wasn't defined
anyway)
also, this enhances the warning messages
previously, only stm32 chips passed the information about which chip to
build on into the compiler. this information is essential to dispatch,
thus defining LPC13XX, LPC17XX, LPC43XX and LM3S in analogy to
STM32F1..4.
vector.o, nvic.o, scb.o and assert.o are available on every platform,
but at least some of them differ between the implementations. they
already got built explicityly on some platforms; now adding them to the
common Makefile.include.
the only change this results in in the example binaries is in the
hackrf-jellybean/systick example, where the the check in
systick_set_clocksource for overflowing from the stm32 area gets used.
these register definitions are common to all cortex mcus. some of the
registers might not be implemented everywhere (especially the floating
point registers), but defining them does no harm.
this modification does not result in any changes in the example
binaries.
now tries to mkdir its way to the output files
this wouldn't be a problem currently if it wasn't for the efm32 data
lingering in the wrong branch, but otoh it's just on the safe side in
case we meet architectures that don't need other specializations at all.
this makes the previous hackish vector.c assemblies into dispatched files
(using the same mechanism as for nvic, just this time in lib).
the old irq.h files that were generated manually from the old vector.c files
were dropped in the process, as were the nvic.h files, and replaced with very
simple yaml lists that generate the headers.
file generation takes place both in the include/ and the lib/ part, as some of
it is definitely header stuff (the NVIC_name_IRQ defines), and some of it needs
to be included in specific compilation units (the weak pragmas).
* created include/libopencm3/cm3/nvic.h from the respective stm32 and
lpc43xx files. the chip specific definitions were left in place (they
were already split out in sthe stm32 case).
* created lib/cm3/nvic.c from the respective stm32 and lpc43xx files. a
hack from the lpc43xx was taken over (for manipulating the internal
interrupts); for now it'll work.
* created a include/libopencm3/dispatch/ directory where the dispatching
of files with common interfaces but different implenentations can
happen; for now, an nvic.h there includes the respective irq name
definitions. (future implementations might have some automation or
preprocessor magic there; so far, it's manual dispatching based on
defines.)
* for efm32, an nvic.h gets generated from an interrupt list, the
rationale for code generation is, in this case, that this can't be
done easily in c preprocessor, and it's really just a list of
definitions and not code proper.
* examples now include <libopencm3/cm3/nvic.h> instead of
<libopencm3/stm32/nvic.h>
