44 Commits

Author SHA1 Message Date
Karl Palsson
0e58ee2f65 stm32: support i2c3 properly
I2C3 is on many parts, but wasn't properly supported with the register
definitions.  Declare them centrally, just depending on the memorymap
defining them. On some parts, the rcc bits were defined, but not the
base registers.

Fixes: https://github.com/libopencm3/libopencm3/issues/820
2018-08-17 00:15:01 +00:00
Karl Palsson
b23dccc7ae stm32: flash: pull up prefetch to _all
Turns out, there's lots of common code for flash.  Pull up prefetch
on/off to start with, as there's only a single bit name different.

Pull up the definitions of common API functions too, starting with
flash_set_ws.  Even if the implementations are different, things that
meant to be the same, should be defined centrally.
2018-07-29 20:31:17 +00:00
Martin Sivak
572a50a53c stm32l0: include rtc module 2018-07-03 22:23:00 +00:00
Karl Palsson
b47b967440 doc: use common naming for peripheral apis
Only applied to STM32 doc trees at present.

Instead of declaring a group for "STM32blah" in the doc-blah.h files,
and then trying to put all the common+specific peripheral code into
those groups, (which is what led to the stub doxygen holder empty .c
files)  Just use a standard name like "Peripheral APIS" and place
everything into that.

Demonstrated by converting ADC and USART peripherals, which is
definitely not complete, but it shows how to make things less magical,
and less prone to copy/paste errors.  Now, you can copy/paste and it
will do the right thing, because everyone uses the same group names.

This is also how to unify the mix of "STM32blah->Periphblah" and _also_
the dangling "periph_file" modules in doxygen, it merges them together
properly, as they're intended to be really.
2018-07-03 22:23:00 +00:00
Martin Sivak
f0e128673d Add DMA support to STM32L0
STM32L0 uses the same DMA peripheral as STM32F0, F1, L1 and others
with some differences. Those are mostly in the number of supported
controllers and channels.

This patch enables the basic support with no attempt to only expose
the available controllers / channels.

For more information see the ST Application Note AN2548.

Signed-off-by: Martin Sivak <mars@montik.net>
2018-04-29 19:22:13 +00:00
Guillaume Revaillot
bf125e91f9 stm32: rework spi, based on PR #740 and #742.
split spi stuff in three part:
 - v1 : basic spi peripheral
 - v1_frf : v1 spi with frf mode additional bit in spi_cr2 / spi_sr
 - v2 : spi with variable datasize, fifo and other fancy stuff.

v1 maps to f1 chips
v1_frf to f2, f4 and l0,l1
v2 to f0, f3 and l4

This breaks spi_master_init API for v2 devices : function prototype from
common spi header used to be abused, with DFF bit reused for CRCL bit.
New v2 spi_master_init does not handle anymore CRCL bits, as it does not
usually mess with other crc configuration.
2018-04-28 21:12:27 +00:00
Karl Palsson
64c5535693 stm32l0: adc: add sample time definitions 2018-04-28 21:12:27 +00:00
Guillaume Revaillot
c670bdca1a stm32l0: enable iwdg 2018-03-28 13:06:57 +00:00
Karl Palsson
7bd7d48408 stm32l0: add all new IRQs from later families 2018-03-08 09:52:21 +00:00
Guillaume Revaillot
1ab0d2445f stm32l0: NVIC: channel 16 is tim3 on stm32l0x0, stm32l0x1 and stm32l0x2.
tim3 interrupt is wired to nvic channel 16 if present.
2018-03-08 10:25:34 +01:00
Karl Palsson
8feb711ca0 stm32l0:rcc: add rcc_set_pll_source() as per L1
reported by: kaeipnos in https://github.com/libopencm3/libopencm3/pull/609
2018-03-02 22:42:05 +00:00
Karl Palsson
c119ee7f9a stm32:l0: enable usart peripheral
Now that the usart-v2 peripheral is extracted cleanly, adding it for l0
is very simple.
2017-10-25 23:26:52 +00:00
Karl Palsson
bc898d1f92 stm32l0: rcc: Add clock struct setup helper
Based on l1, l4 and friends.
2017-06-08 23:01:45 +00:00
Karl Palsson
29c712326f stm32: rcc: extract osc_bypass functions
rcc_osc_bypass_enable and rcc_osc_bypass_disable have been copy/pasted
around for the last time!  There's a compile bit to check for L0/L1, but
otherwise this is just code duplication for no gain.
2017-06-08 23:01:45 +00:00
Karl Palsson
2547bf66d9 stm32l0: flash: use common functionality
Provides all the basic core functionality shared with L1.  No special L0
functionality supported at this point.
2017-06-08 23:01:45 +00:00
Matthew Lai
383fafc862 stm32: renamed pwr_common_all to pwr_common_v1, and pwr_common_l01 to pwr_common_v2 2017-03-30 21:48:08 +00:00
Karl Palsson
d1d511c6f4 stm32: rcc: add reset reason group flags.
Originally suggested in https://github.com/libopencm3/libopencm3/pull/399

At least provide macros for each family that allows easy masking of the
full set of reset reason flags.  Trying to provide a function that
provides these in random upper bits seems unclear at best.
2017-03-30 21:48:08 +00:00
Karl Palsson
623fabca5f stm32l0: rcc: add new peripheral enable bits
I2C3, USART4/5, GPIOE
2017-03-30 21:48:07 +00:00
Karl Palsson
b556a72fdb stm32l0: use current RCC bit names
Early revisions of the reference manuals used different names for the
touch sense controller and firewall bits.  These have now been changed
to be more in line with other families, and as these parts and bits were
new in this library, simply move forward to the current naming
convention.
2017-03-30 21:48:07 +00:00
Sergey Matyukevich
59ef83a440 stm32: l0/l4: add i2c support
According to reference manuals both l0 and l4 have "v2" i2c peripheral.
This patch adds i2c support to l0 and l4 using previously unified "v2" i2c
headers and implementation.

No real hardware has been tested so far. Only compilation tests for both
libopencm3 and libopencm3-examples for all stm32 families.

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
2017-03-30 21:48:07 +00:00
Karl Palsson
05829037de stm32:rng: add common v1 to l0,l4,f7
This is a common peripheral based on reference manual inspection.
2017-03-30 21:48:07 +00:00
Karl Palsson
7c3d39fda4 stm32l0: rcc: fix definition of RCC_CSR_RTCEN bit
Fixes https://github.com/libopencm3/libopencm3/issues/720
2016-12-08 10:44:32 +00:00
Karl Palsson
da91794f52 stm32: rcc: Rationalize MCO definitions
Some parts used HSICLK, some used HSI.  Most used NOCLK, f3 used
DISABLED.  Try and move all to the shorter, simpler forms, instead of
having mixed defines for different targets for the same thing.  Just
because the bits themselves are different doesn't mean we should make it
more difficult for users to port code.
2016-11-29 15:06:19 +00:00
Karl Palsson
4eb51ecaea stm32: rcc: rcc_wait_for_osc_ready is always available
Move the prototype to the common_all header and include documentation.
2016-08-18 23:41:04 +00:00
Eric Kerman
9b642dea2a stm32l0: Add timer support
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2016-08-15 21:10:07 +00:00
Karl Palsson
77c0a2058c stm32l0: land adc-v2 peripheral support
Now that the big pieces of the adc-v2 common files are in place, start
including l0 in the builds.  This includes only the very very basic core v2
peripheral functions, and the very basic definitions.
2016-03-30 16:59:56 +00:00
Karl Palsson
3a7cbec776 stm32l/stm32f: name space standardization [BREAKING]
As done by esden for the F4, remove typedefs and add prefixes to clock enums
This extends this to all stm32 families.

    Let's not hide the fact that these variables are structs/enums.

    We are filling up the namespace badly enough, we should be prefixing as
    much as we can with the module names at least. As users we already run
    often enough in namespace colisions we don't have to make it worse.

    * CLOCK_3V3_xxx enums renamed to RCC_CLOCK_3V3_xxx
    * clock enums (PLL, HSI, HSE ...) prefixed with RCC_
    * scale enum of pwr module prefixed with PWR_
2015-12-14 23:26:42 +01:00
Karl Palsson
2e25d678ba Surround all macro parameters with ()
Followup from c72f3d588a637101262d5e2b276dc6cc5d926a6d
2015-10-15 01:03:18 +00:00
Karl Palsson
c72f3d588a Surround all macro parameters with ()
All the macro arguments that are user supplied, or potentially, wrap properly
in () as good practice.

Probably missed one or two, and a lot of them are possibly unnecessary, but
it's straightforward to just do it always.

Fixes github issue #321
2015-10-14 22:15:15 +00:00
Karl Palsson
f1d8a7ef04 stm32l0: Add USB support via st_usbfs driver. 2015-10-06 00:54:17 +00:00
Robin Kreis
8e7a89ac75 stm32l0: add EXTI definitions 2015-10-06 00:53:51 +00:00
Robin Kreis
112cf5d085 stm32l0: commonize PWR definitions and add to l0 2015-10-06 00:53:51 +00:00
Robin Kreis
0a76a24286 stm32l0: add LPTIM definitions 2015-10-06 00:53:51 +00:00
Robin Kreis
232a33b01d stm32l0: add SYSCFG definitions
Modified to update to latest reference manual.

Changes to CFGR3, some extra bits.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2015-10-06 00:53:51 +00:00
Karl Palsson
29ede503f3 stm32l0: rcc: add more helper routines. 2015-10-06 00:53:51 +00:00
Karl Palsson
cebc335846 stm32l0: Simplify rcc defines.
More could probably be found, but this makes some of the basic RCC defines for
the L0 much more inline with other platforms, and much less verbose.  This
helps us have more identical code for library users across different targets.
2015-10-06 00:53:02 +00:00
Kuldeep Singh Dhaka
5c73d60176 usb: Moved USB_PMA_BASE address definition to family-specific memorymap.h
credit: @fenugrec
2015-08-17 00:21:16 +00:00
Karl Palsson
5746fd4d25 stm32: common: Extract MCO source setting
This adds MCO source selection to some targets, and removes and standardizes
the mask/shift usage for all targets.  For devices that support MCO2, this
supports only MCO1.  No attempt has been made to extract MCO prescaler, which
is not available on all F1 and F3.
2015-04-29 01:22:27 +00:00
Chuck McManis
14ad92015e Audit RTCPRE Shift and Mask Values
L0 - RTC Prescaler appears in RCC_CR, bit 20, 2 bits wide (RM0367 Rev 2)
L1 - RTC Prescaler appears in RCC_CR, bit 29, 2 bits wide (RM0038 Rev 10)
F0 - no prescaler setting (RM0091 Rev 7)
F1 - no prescaler setting (RM0041 Rev 4)
F2 - RTC Prescaler appears at RCC_CFGR, bit 16, 4 bits wide (RM0033 Rev 6)
F3 - no prescaler setting (RM0316 Rev 3)
F4 - RTC Prescaler appears at RCC_CFGR, bit 16, 4 bits wide (RM0090 Rev 8)
2014-12-14 16:29:03 -08:00
Chuck McManis
9ddfcb0e53 Rename rcc_ppre1_frequency and rcc_ppre2_frequency
Rename rcc_ppre1_frequency and rcc_ppre2_frequency to rcc_apb1_frequency and rcc_apb2_frequency
Also add rcc_ahb_frequency (although it is not set correctly in all cases) which will be fixed by
the rcc commits later. Also fixup the only use in the library of these variables, the USART code.

And fix the typos that resulted
Make l1 generic too
2014-12-13 19:49:04 -08:00
Karl Palsson
f51698fff4 stm32:l0: RCC: add osc_on/osc_off helpers
These are the routines that have custom switch cases, and aren't easy targets
for pulling out.
2014-12-03 11:13:39 +00:00
Karl Palsson
378069091a stm32:l0: Add RCC register definitions
Tested with a miniblink example on the l053 discovery board.

Only register definitions at this stage, no helpers.
Register definitions from RM0367r2, hopefully the biggest
superset of L0 parts.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2014-12-03 11:13:39 +00:00
Frantisek Burian
eee5a45019 [stm32l0] Integrate the L0 architecture to the doxygen documentation
Conflicts:
	doc/Makefile
2014-10-15 19:33:20 +02:00
Frantisek Burian
f9152eb00a [stm32l0] Initial support for STM32L0 architecture, Add GPIO peripheral 2014-10-15 19:31:41 +02:00