Add the register definitions and some of the most basic helper functions
for the new style BCD RTC module found on the F2, F4, L1, F3 and F0.
This tries to keep as close to HACKING_COMMON_DOC as possible, while
maintaining sane names.
Code added for L1 to support the PWR Control block didn't properly
follow the HACKING_COMMON_DOC guidelines. The naming was wrong, and
some headers were missing. This commit has no functional changes, it
only addresses the style and structure problems.
Updated the documentation so that it appears in all families
Also added it to the L1 area, but is untested. An addition to the memorymap
allows commonality and a #ifdef added to the spi_common_all code to
exclude the case of SPI3 for L1 and F0 as SPI3 doesn't exist in those.
An rcc dispatch header was added to remove same code from the spi header.
In the header:
- Fix DMA_SxCR_CT: change shift from 18 to 19
For use with the convenience functions:
- Added DMA_SxCR_CHSEL generic values
- Added DMA_STREAM - generic values
- Added dma_if_offset - rather than separating out LISR and HISR
- Added masks
- Added dma_disable_double_buffer_mode()
this merges common c and header files of different architectures, adds a
dispatch mechanism and yaml descriptions of interrupt handlers from which the
whole interrupt table setup c code is generated.
vector.o, nvic.o, scb.o and assert.o are available on every platform,
but at least some of them differ between the implementations. they
already got built explicityly on some platforms; now adding them to the
common Makefile.include.
these register definitions are common to all cortex mcus. some of the
registers might not be implemented everywhere (especially the floating
point registers), but defining them does no harm.
this modification does not result in any changes in the example
binaries.
Conflicts:
lib/lm3s/vector.c -- split out to lm3s/irq.h
lib/stm32/f4/vector.c -- put the floating point initialization code into a function like in lpc43xx
the cortex generic interrupts get moved to lib/cm3/vector.c, the
platorms' individual irq names, initialization and handler prototypes go
to platoform specific irq.h files.
as the vector.c file heavily depends on platoform specific headers, it
can't be built once-and-for-all in lib/cm3/, so there are inclusion
stubs in the various architecture dirs; this might be better solved with
Makefile / include path handling.
one particular file is lib/lpc43xx/vector.c; that platform's
initialization code contains an additional section to copy everything
from flash to ram (which probably performs better there). that code
still resides in the inclusion stub, and gets mashed in using defines.
would need a cleaner implementation together with the Makefile solution.
this commit contains some files of the upcoming efm32 branch, from which
it was cherry-picked.
the .bin files produced from before and after this commit only differ in
lpc43xx, where the startup sequence was subtly modified.
Adds libopencm3/cm3/assert.h header that provides assertion check macros
similar to those provided by the standard C library.
Thanks to Nicolas Schodet for help.
That way, data source address does not depend on any other unrelated change in
linker script.
This also fixes cases when .data input section is aligned on 8 bytes. The new
version does not provide any address for the output section so that it is
aligned to the strictest input section. The _data_loadaddr symbol will
always take this alignment into account.
- The library files are now being built into the lib subdirectory of the
source.
- The linker files for each library are being copied into the lib source
subdirectory.
Motivation: The relative locations of files in the source directory after make
are now the same as after make install now. This makes it easier to
reuse examples with their makefiles outside of the libopencm3
sourcecode directory.
IDR represents the level on pin input while ODR is the value requested by the
programmer. This makes a difference for example when using the output as open
drain.
