ITM Stimulus ports need to be accessible with different sizes
The amount of data written out is determined by the size of the write.
Writing a full 32 bit value when you only need 8 for printf() style
substantially reduces the available bandwidth of the SWO
Note: this is an API change for doing 32bit writes.
Old:
ITM_STIM[stimulus_port] = value
New:
ITM_STIM32(stimulus_port) = value
This api is much more in common with some of the other registers that
behave this way. As there's very little (if any) code already using
this API, it's a good time to fix it permanently.
Remove misleading ITM register definitions
ITM_SSPSR is the supported parallel trace size, in _bits_
ITM_CSPSR is in _bits_ as well. There's really no advantage in even
having these sorts of definitions in libopencm3, as these settings are
normally controlled from the debugger side, not the target itself.
Lock and lock status register definitions were added, as per ARM:
"For ARMv7-M, the component ID registers are required for the ROM table,
and the CoreSight management lock access mechanism is defined for the
DWT, ITM, FPB and TPIU blocks."
The direct access definitions to the SHPR1 SHPR2 and SHPR3 were simply
wrong, and though a handy macro for directly reaching any priority field
was provided, the definitions of the fields assumed direct access to the
registers.
Provide field definitions that match the handy macro, and correct the
direct access definitions for people wishing to use them.
We should not add compiler extensions, it is not our job. We are not a
selfcontained project as kernel is so we should not introduce things
like this.
If we need to add some abstraction for this in the future to support
compilers doing these things differently then we will do that the same
way we dealt with the depricated attribute.
In places where we were defining memory mapped peripheral buffers we
were using directly a cast to "volatile int_type *". For consistency we
should use dereferenced accessor like: &MMIO32(address)
Added --terse and --mailback options to the make stylecheck target. It
also does continue even if it enounters a possible error.
We decided on two exceptions from the linux kernel coding standard:
- Empty wait while loops may end with ; on the same line.
- All blocks after while, if, for have to be in brackets even if they
only contain one statement. Otherwise it is easy to introduce an
error.
Checkpatch needs to be adapted to reflect those changes.
Adding this attribute allows to avoid warnings issued by GCC in cases
when 'scb_reset_system' is used as a last call in a function with
"noreturn" attribute set(usually reset handler of some sorts)
This commit add a structure definition that represents the stack frame
layout as it is upon entering exception handler. This is useful when
one wants to alter the exception return address, or get information
about registers state saved by the CPU.
the only change this results in in the example binaries is in the
hackrf-jellybean/systick example, where the the check in
systick_set_clocksource for overflowing from the stm32 area gets used.
these register definitions are common to all cortex mcus. some of the
registers might not be implemented everywhere (especially the floating
point registers), but defining them does no harm.
this modification does not result in any changes in the example
binaries.
the cortex generic interrupts get moved to lib/cm3/vector.c, the
platorms' individual irq names, initialization and handler prototypes go
to platoform specific irq.h files.
as the vector.c file heavily depends on platoform specific headers, it
can't be built once-and-for-all in lib/cm3/, so there are inclusion
stubs in the various architecture dirs; this might be better solved with
Makefile / include path handling.
one particular file is lib/lpc43xx/vector.c; that platform's
initialization code contains an additional section to copy everything
from flash to ram (which probably performs better there). that code
still resides in the inclusion stub, and gets mashed in using defines.
would need a cleaner implementation together with the Makefile solution.
this commit contains some files of the upcoming efm32 branch, from which
it was cherry-picked.
the .bin files produced from before and after this commit only differ in
lpc43xx, where the startup sequence was subtly modified.
Adds libopencm3/cm3/assert.h header that provides assertion check macros
similar to those provided by the standard C library.
Thanks to Nicolas Schodet for help.
New doc directory with config files and generated html, LaTeX/pdf.
Makefile provided for autogeneration and explanatory README.
The project structure is hostile to doxygen, which can't cope with functions
of the same name. Doxygen is run for each family separately, and separately
for LaTeX generation. Customized layout files sort of "integrate" HTML, and
separate pdfs are generated for each family. Not ideal but seems the best
solution until doxygen changes, if at all.
file having its own group module rather than using @file.
No code changes except for the following:
gpio: Added function to map the eventout signal plus two Remap functions
dma: Prevent changing base addresses while channel enabled (see datasheet)
pwr: Added pwr.c (new file)
timer: Removed the last function that I introduced recently; there is already
an equivalent function present. Changed some parameter names for consistency.
Added scu driver file scu.c.
Modified Makefile/Makefile.include to generate .map file and use -O2 as optimization.
Modified hackrf-jellybean miniblink.c to enable 1V8 and blink LED1,2&3 with configuration of PinMux and GPIO.
