Extract the calibration code from the f0, and share it with the other
adc-v2 peripheral users (f0,l0,f3,l4)
Uses the same naming set of is/async naming conventions requested by the
RTOS guys instead of having blocking only calls.
Old code:
adc_calibrate_start(ADC);
adc_calibrate_wait_finish(ADC);
New code (blocking):
adc_calibrate(ADC);
New code (asynch):
adc_calibrate_async(ADC);
// do stuff
adc_is_calibrating(ADC); // will be false when it's finished.
Old code for f0 is still available, but marked deprecated.
Start providing async routines for all blocking routines, to make it
easier to use libopencm3 in some RTOS environments. This is not in
anyway intended to be complete, this just covers a single blocking
routine, rcc_wait_for_osc_ready. Documentation added to the top level,
and provided for all stm32 families.
This is common code for f0234, keep renaming files as has become standard, even
if it's a suboptimal solution. This doesn't rename the header which was not
renamed for f3.
Reported-by: https://github.com/gtoonstra
The adc v2 periph has the same register map, but comes in two flavours, one
supporting injected channels, more watchdogs, per channel sampling times and
so on, and one "simple" version.
Pull up the f3 and f0 portions into the appropriate files, after comparing with
L0 and L4 reference manuals, even if those are not fully landed yet.
The f0, f30x and l0 have a very similar "v2" adc peripheral.
Start extracting out some of the common code, and fix the glaring bug in
adc_power_down that was affecting them both.
This is not intended to be a fully comprehensive extraction, just the first
easy steps.
As done by esden for the F4, remove typedefs and add prefixes to clock enums
This extends this to all stm32 families.
Let's not hide the fact that these variables are structs/enums.
We are filling up the namespace badly enough, we should be prefixing as
much as we can with the module names at least. As users we already run
often enough in namespace colisions we don't have to make it worse.
* CLOCK_3V3_xxx enums renamed to RCC_CLOCK_3V3_xxx
* clock enums (PLL, HSI, HSE ...) prefixed with RCC_
* scale enum of pwr module prefixed with PWR_
After adding support to the f3, add missing doxygen support to the f0
equivalent. This improves things and keeps them consistent until/if they are
pulled out as common code.
Renamed every instance of variable CFLAGS in target specific Makefiles
to TGT_CFLAGS to free up CFLAGS for user defined compiler flags.
Added information in README.md about existence and usage of CFLAGS
environment variable in build process.
Based on previous work, add a new driver for the v2 usb peripheral found on
stm32f0 and l0 devices.
Correspondingly, add a usb gadget zero test suite for the f0. L0 device level
code isn't yet ready, but will add the test case when it moves in.
Work by Frantisek Burian, Kuldeep
Singh Dhaka, Robin Kreis, fenugrec and zyp on irc, and all those forgotten.
-ggdb3 make slightly bigger .elf files, but allows gdb to understand
macros, which libopenocm3 uses somewhat extensively. Make this the
default, and pull it up to the common base makefile, so it can be easily
substituted.
This adds MCO source selection to some targets, and removes and standardizes
the mask/shift usage for all targets. For devices that support MCO2, this
supports only MCO1. No attempt has been made to extract MCO prescaler, which
is not available on all F1 and F3.
F0 should check the oscillator ready bits in the regular registers, just
like the docs claim, and just like every other stm32, rather than trying
to check for the interrupt flags.
Reported-by: n1b on irc
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Rename rcc_ppre1_frequency and rcc_ppre2_frequency to rcc_apb1_frequency and rcc_apb2_frequency
Also add rcc_ahb_frequency (although it is not set correctly in all cases) which will be fixed by
the rcc commits later. Also fixup the only use in the library of these variables, the USART code.
And fix the typos that resulted
Make l1 generic too
Pulls out duplicate calls from f0/rcc.c and uses the common version which
also means that f0 can use rcc_peripheral_enable() now which is in common
but not the old rcc versions.
This commit has been based on kuldeepdhaka's pioneer work, but it was reformatted to apply libopencm3 inclusion tree correctly.
timer_common_all.c now supports new rcc_periph_reset_pulse function for all families.
to remove variations, redundancies, add missing, fix errors. All c files
refer only to the dispatch style headers in /include/stm32. Those headers
#include memorymap.h and cm3/common.h. All references to
these are removed from the family specific headers. Ethernet untouched as
it appears incomplete.
Added dummy spi.c for F0/F3. Fix some doxygen anomalies.
On linux, the output of CP rule was try to write to / which is - of course, forbidden for write.
This solution adds to each part of lib correct pointer to the root of lib where the libs should be written.
Bug found by Kuldeep Singh Dhaka.
Extension of code for STM32F1 to allow for dual bank series XL.
Small changes to documentation for F2, F4 and L1 to add a parameter reference.
Tested with STM32F103RBT6
(note: tests show that the PG bit must be cleared after programming, otherwise
a subsequent erase attempt fails. This has been added to flash_program_half_word
for F0 and F1 only. A fix for the other families is not included in this PR.)
So that the navigation pane works correctly in browsers.
Some additional doc fixes put in where found (but many more still to go).
Added some dummy .c and .h files to bring the associated docs into line.
makefile changed to allow 'make html' as well as 'make doc' (the latter only does html anyway).
The STM32F05xxx/06xxx manual describes on p.98 (Sec 7.4.1) the RCC_CR
register, on which it says that bit 24 is the PLLON bit which has to be
enabled before using the PLL. This causes the PLL to be enabled with
rcc_osc_on(PLL).
