jackcartersmith/blackmagic
1
0
Fork 0
Code Issues Pull Requests Releases Activity
1,319 Commits 3 Branches 18 Tags
Commit Graph

1319 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Federico Ruiz Ugalde
b6bae46b71 Unnecessary include of pwr.h removed from rcc.c. Pwr.h becomes unnecessary to run the f3 2013-07-07 16:01:47 -07:00
Federico Ruiz Ugalde
934821aa42 Partial flash support added. 2013-07-07 16:01:47 -07:00
Federico Ruiz Ugalde
d42be7e6e9 F3 missing headers added. 2013-07-07 16:01:46 -07:00
Federico Ruiz Ugalde
45035f2f3c Fixed compile warning, function declaration in rcc.h wrong 2013-07-07 16:01:46 -07:00
Federico Ruiz Ugalde
44874100c6 pwr headers added. Now f3 support compiles 2013-07-07 16:01:46 -07:00
Federico Ruiz Ugalde
d250e8e269 general gpio for stm32 modified to include f3 2013-07-07 16:01:46 -07:00
Federico Ruiz Ugalde
0ca18eb09f Added interrupts for f3, Pre_main rutine in vector_chipset, nvic.h modified to include f3. 2013-07-07 16:01:46 -07:00
Federico Ruiz Ugalde
b8764d0214 Makefile for f3 lib added. Gpio.c and rcc.c also in. 2013-07-07 16:01:46 -07:00
Federico Ruiz Ugalde
67c979e5fa Fixed compile of f4 and l1 after gpio_common_f234.c renaming. 2013-07-07 16:01:46 -07:00
Federico Ruiz Ugalde
be874f065a Memory map for f3 added. 2013-07-07 16:01:46 -07:00
Federico Ruiz Ugalde
a156b9e8fc linker script file for f3 added. 2013-07-07 16:01:45 -07:00
Federico Ruiz Ugalde
3af5833b83 Initial support for stm32f3. Changes in makefiles, gpio. 
- Makefiles now include building f3 src directory.
- Gpio support added. gpio_common_f24 changed to support also f3.
- f3 still not compiling, but f2 compile not broken (probably also f4).
 2013-07-07 16:01:45 -07:00
Ben Gamari
d7fdcefbd7 lpc43xx: Fix rom_to_ram linker script 
It was missing some definitions compared to the libopencm3_lpc43xx.ld.
 2013-07-07 18:22:56 -04:00
Piotr Esden-Tempski
8769073266 [install] Be more specific about what scripts we want to install. 
We now have a subdirectory containing register definitions in scripts,
this confuses the install command so we have to be more specific about
which scripts to install. We actually only want to install the black
magic scripts from there as they are useful for locm3 users.
 2013-07-07 14:11:58 -07:00
Piotr Esden-Tempski
b72a3640b3 [CM0] Disabled sync for LPC43xx/M0. 
We are currently using the same code for CM0 CM3 and CM4 cores. This
patch is a bodge that disables sync on the LPC43xx/M0 core, it would be
nicer to probably implement a dispatch system similar to the one used in
stm32 peripheral support so that we can accomodate the different
features of the cortex cores. I (esden) assume we will run into more
incompatibilities in the future between the cortex cores.
 2013-07-07 13:58:00 -07:00
Ben Gamari
cd1f6fac80 sync.h: Fix spelling 2013-07-07 13:52:16 -07:00
Ben Gamari
11ea9b090c sync: Add comment 2013-07-07 13:52:16 -07:00
Ben Gamari
78081bd794 lpc43xx: Add irq.yaml for M0 core 2013-07-07 13:52:16 -07:00
Ben Gamari
c25461dfce lpc43xx: Move M4 specific files to m4/ 2013-07-07 13:52:15 -07:00
Ben Gamari
3ab761d244 Remove dead lpc43xx_m0/vector.c 2013-07-07 13:52:15 -07:00
Ben Gamari
9aa2f82164 lpc32xx_ram_only.ld: Fix region name 2013-07-07 13:52:15 -07:00
Ben Gamari
8eb5fba93b lpc43xx/uart: Fix code style 2013-07-07 13:52:15 -07:00
Ben Gamari
fa47bb80d5 lpc43xx/uart: Fix TER register definition 
I'm not sure why bit 7 and offset 0x30 were used previously. Revision
1.6 of UM10503 claims that the TXEN bit is bit 0 in all UARTs' TER
registers.
 2013-07-07 13:52:15 -07:00
Ben Gamari
dbf9c3bc39 lpc43xx/uart: Kill _BITMASK definitions for single-bit fields 2013-07-07 13:52:15 -07:00
Ben Gamari
b0550ce0bf lpc43xx/uart: Uncomment register definitions 2013-07-07 13:52:15 -07:00
Ben Gamari
2b027cf2de Makefile: Install everything in scripts/ 2013-07-07 13:52:14 -07:00
Ben Gamari
8201703e64 lpc43xx/ssp: Fix duplicate function definition from merge 2013-07-07 13:52:14 -07:00
Ben Gamari
994e679fb8 lpc43xx: Clean up linker script breakage from merge 2013-07-07 13:52:14 -07:00
Ben Gamari
580be39e47 lpc43xx: Convert register definitions to YAML 2013-07-07 13:52:14 -07:00
Ben Gamari
4fd218ad4c lpc43xx/gen.py: Take YAML input 2013-07-07 13:52:14 -07:00
Ben Gamari
4d6a5d9606 lpc43xx: Move YAML OrderedDict code to separate module 2013-07-07 13:52:14 -07:00
Ben Gamari
21e4d4600f lpc43xx: Add script to convert CSV files to YAML 2013-07-07 13:52:14 -07:00
Ben Gamari
036cb51676 lpc43xx/gpdma.csv: Fix INTSTAT register name 2013-07-07 13:52:14 -07:00
Ben Gamari
e8af7a98ee lpc43xx/ssp: Add ssp_transfer 2013-07-07 13:52:13 -07:00
Ben Gamari
0d29b1d2d6 lpc43: Use uint*_t instead of u* 2013-07-07 13:52:13 -07:00
Ben Gamari
26162762b7 lpc43xx: Update linker scripts 2013-07-07 13:52:13 -07:00
Ben Gamari
fa9fa986df lpc43xx/uart: Add missing BEGIN/END_DECLS 2013-07-07 13:52:13 -07:00
Ben Gamari
17fd708f66 Move lpc43xx and lpc43xx_m0 code to lpc43xx/ hierarchy 
Previously there were nasty dependency issues causing M4 objects to be
linked into the M0 library
 2013-07-07 13:52:13 -07:00
Hoernchen
16424d1c69 m0: remove useless remap 
The m4 will 1) remap 2) start the m0, so it already is remapped, if it's
not, then we'd never execute this code anyway.
 2013-07-07 13:52:13 -07:00
Hoernchen
4c8d260232 make sure the m0 is really running/stopped 2013-07-07 13:52:13 -07:00
TitanMKD
e5a4dd0609 Cleanup M0 makefile to avoid copying file from lpc43xx(M4) directory. 2013-07-07 13:52:13 -07:00
TitanMKD
786e3215a4 Fixed a problem with rom to ram. (which can produce error "cannot move location counter backwards") 2013-07-07 13:52:12 -07:00
TitanMKD
0dec187fee lpc43xx basic IPC for multicore M4 & M0 (with basic examples for hackrf jellybean). 2013-07-07 13:52:12 -07:00
TitanMKD
439957155b Added SGPIO structure for faster/better code generation (especially when optimized with -O2/-O3). 
This structure is compliant with LPC43xx User Manual UM10503 Rev.1.4 - 3 September 2012.
 2013-07-07 13:52:12 -07:00
TitanMKD
edab264704 Added _data_rom / _edata_rom for ld ram only and standard spifi ld Fixed ROM to RAM copy of ".data" 2013-07-07 13:52:12 -07:00
Jared Boone
f4e45e74bc Add a duty cycle count argument to i2c0_init() to adjust for changes in APB1 clock. 2013-07-07 13:52:12 -07:00
Jared Boone
18bcbc3d28 Consolidate ssp_read and ssp_write into a single function, ssp_transfer. SSP bus transfers are bi-directional -- when bytes are written, they are also read. 2013-07-07 13:52:12 -07:00
Jared Boone
25d7853422 Switch ssp.c to using CGU #defines instead of local #defines. 2013-07-07 13:52:12 -07:00
Michael Ossmann
0f180ceffd do not try to install scripts/data 2013-07-07 13:52:12 -07:00
Jared Boone
df922b9021 Corrected GPDMA_INTSTAT #define name typo. 2013-07-07 13:52:11 -07:00