802 Commits

Author SHA1 Message Date
Robin Kreis
112cf5d085 stm32l0: commonize PWR definitions and add to l0 2015-10-06 00:53:51 +00:00
Robin Kreis
0a76a24286 stm32l0: add LPTIM definitions 2015-10-06 00:53:51 +00:00
Robin Kreis
232a33b01d stm32l0: add SYSCFG definitions
Modified to update to latest reference manual.

Changes to CFGR3, some extra bits.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2015-10-06 00:53:51 +00:00
Karl Palsson
29ede503f3 stm32l0: rcc: add more helper routines. 2015-10-06 00:53:51 +00:00
Karl Palsson
cebc335846 stm32l0: Simplify rcc defines.
More could probably be found, but this makes some of the basic RCC defines for
the L0 much more inline with other platforms, and much less verbose.  This
helps us have more identical code for library users across different targets.
2015-10-06 00:53:02 +00:00
Karl Palsson
63cfc6932a stm32l0: Add Clock Recovery System to build 2015-10-06 00:53:02 +00:00
Karl Palsson
d67aec1cc8 stm32: Clock Recovery System is a common peripheral.
Pull it out of the F0 directory ready to be used by other devices with this
peripheral.
2015-10-06 00:52:39 +00:00
Karl Palsson
f5eb96caf3 usb: Add st_usbfs_v2 for f0/l0 devices
Based on previous work, add a new driver for the v2 usb peripheral found on
stm32f0 and l0 devices.

Correspondingly, add a usb gadget zero test suite for the f0.  L0 device level
code isn't yet ready, but will add the test case when it moves in.

Work by Frantisek Burian, Kuldeep
Singh Dhaka, Robin Kreis, fenugrec and zyp on irc, and all those forgotten.
2015-10-03 02:03:58 +00:00
Karl Palsson
e121243ce2 usb: extract ST USB FS peripheral core. [BREAKING CHANGE]
The breaking changes here changes in header location, and changes in driver
name passed down to the usb stack.

Changes affect: stm32f102/f103, stm32l1, and some f3 parts

* instead of the confusingly generic "usb" use the name "st_usbfs" for the USB
  Full speed peripheral ST provides in a variety of their stm32 products.
  Include directives should change as:
      #include <libopencm3/stm32/usb.h> => <libopencm3/stm32/st_usbfs.h>

* instead of the confusingly specific "f103" name for the driver, use
  "st_usbfs_v1"  [BREAKING_CHANGE]

  Instead of:
    usbd_init(&stm32f103_usb_driver, .....) ==>
    usbd_init(&st_usbfs_v1_usb_driver, .....) ==>

The purpose of these changes is to reduce some confusion around naming, but
primarily to prepare for the "v2" peripheral available on stm32f0/l0 and some
f3 devices.

Work by Frantisek Burian, Kuldeep Singh Dhaka, Robin Kreis, fenugrec and zyp
on irc, and all those forgotten.
2015-10-03 01:32:34 +00:00
Karl Palsson
f49cbee683 usb: otg-dev: disable and flush endpoints on reset
Only resetting the fifo memory pointers can result in corrupt data.

Tested on f4 disco board with the gadget0 test suite.
2015-09-22 22:28:02 +00:00
Hanspeter Portner
be56146407 stm32f3: fix ADC2/4 "slave" memory map.
Main memory map just lists the base address for the pairs, doesn't clarify the
offset for the slave devices.
2015-08-23 11:34:21 +00:00
Kuldeep Singh Dhaka
0d1f5fc036 usb: Added USB_FNR register defines
credit: @fenugrec
2015-08-18 00:38:48 +00:00
Kuldeep Singh Dhaka
5c73d60176 usb: Moved USB_PMA_BASE address definition to family-specific memorymap.h
credit: @fenugrec
2015-08-17 00:21:16 +00:00
Amir Hammad
6357630a90 stm32/usb: otg_fs and otg_hs register definitions
* USB host register definitions added.
* Extracted common register and bitfield definitions
	from 'otg_fs.h' and 'otg_hs.h'
	into new file 'otg_common.h'.
	Modified usb low-level drivers to adopt to new style of bitfields.
* Fixed typo OTG_GOTGIN -> OTG_GOTGINT (according to the datasheet)

Signed-off-by: Amir Hammad <amir.hammad@hotmail.com>
2015-08-16 22:13:53 +00:00
Ken Sarkies
4d315288cf stm32: pwr: Use consistent include guards.
All STM32 family pwr.h must use LIBOPENCM3_PWR_H as include guard so that
pwr_common.h can detect that it has been referenced by pwr.h for
each family. F2 and F3 had the wrong include guard.

Fixes Github issue #513
2015-08-10 10:08:05 +00:00
Karl Palsson
a2af34d0e1 stm32f1:rtc: whitespace/style cleanup.
Improperly checked pulls before commiting.  Trivial whitespace only change.
2015-07-31 05:21:46 +00:00
Ken Sarkies
d316bbca39 stm32:f1:RTC: Replace direct register access with API calls
Some additional functions added to rcc to support the rtc.
2015-07-31 04:49:56 +00:00
Ken Sarkies
957c5233f4 stm32:f1:RTC: add documentation 2015-07-31 04:48:57 +00:00
Karl Palsson
40cde559a7 stm32: f24: doxygen updates for flash program width.
More doxygen, more better.
2015-07-31 03:51:32 +00:00
Karl Palsson
ec15c1ca64 stm32: f24: flash: Make code match documentation
This removes the shift from the defines, and includes them in the helper
function, making the code match the documentation, and following how the
rest of the library commonly operates.

Code using the existing defines will continue to work.
2015-07-31 03:51:25 +00:00
Jorik Jonker
07ee71cf23 stm32f4: rcc: Add 84Mhz, max speed for f401
Basic helpers to at least support common configurations for the f401.

Original submission specified 5 wait states, but the reference manual and other
reviewers all believe that 2ws is sufficient for these modes.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2015-07-31 02:25:23 +00:00
Karl Palsson
07094ea418 usb: Fix typo in Battery Charge Detection defines
Correct register name for f0/l0 is USB_BCDR.
Correctly add the register descriptions that were missing in the
original commit.
2015-07-29 21:44:11 +00:00
Kuldeep Singh Dhaka
afefa6888c stm32: usb: Rename USB_DADDR_ENABLE flag per ref manual
Use the standard REG_BIT name from the reference manuals, as specified
in HACKING  All the other bits have the correct naming.
2015-07-29 21:22:32 +00:00
Karl Palsson
b1e495f51a stm32f3: adc: Add support for sequence completion flags
The f3 adc has separate bits for end of conversion and end of sequence.
Support those fully, with the regular enable/disable irq methods, and
the flag checking methods.

Discovered in github bug: #493
2015-07-29 13:28:18 +00:00
Karl Palsson
e65140d0d3 stm32f3: adc: remove invalid eoc group methods.
This code was copied from the f4, and blindly modified to make it seem
to work.  The f3 has separate flags for EOC and EOS, it doesn't use a
second bit to configure what the EOC bit does.

Consequently, update the documentation to correctly indicate that the
EOC bits are only set per conversion.

Discovered in github bug: #493
2015-07-29 13:22:17 +00:00
Kuldeep Singh Dhaka
43e66927fc usb: Remove redundant stm32/usb_desc.h
This file is a renamed and restructured copy of /usb/usbstd.h.  The usbstd.h
file should be used instead, as it uses standard usb names.
2015-07-15 12:24:53 +00:00
Karl Palsson
1a398fd742 stm32f0: syscfg cfgr1 bit define updates
Use _FMP for the bit definitions as per the ref manual.
Add missing bits from newer ref manual (RM0091r6)
2015-07-15 12:19:39 +00:00
Karl Palsson
a4bb8f7e24 stm32f4: fix i2s_ext register addresses
Registers were swapped.

Fixes #465
2015-06-22 01:11:50 +00:00
Kuldeep Singh Dhaka
c28d7bc187 stm32: spi: Standard mode selection
Allow setting cpol/cpha via standard mode numbers, instead of separate calls
for each bit.
2015-05-25 13:03:20 +00:00
Karl Palsson
5746fd4d25 stm32: common: Extract MCO source setting
This adds MCO source selection to some targets, and removes and standardizes
the mask/shift usage for all targets.  For devices that support MCO2, this
supports only MCO1.  No attempt has been made to extract MCO prescaler, which
is not available on all F1 and F3.
2015-04-29 01:22:27 +00:00
kbob
fd141a8131 Definitions for LTDC (LCD-TFT video). 2015-02-20 19:40:23 -08:00
Piotr Esden-Tempski
5658a4ebcf [stm32f4-ltdc] Style cleanup.
Mainly replaced function like defines with static inline functions.
2015-02-12 19:02:51 -08:00
Piotr Esden-Tempski
34e9e8c3e1 [stm32f4-ltdc] Remove the LCD_TFT_BASE define.
This define name was used because of datasheet inconsistency. The
correct name is LTDC.
2015-02-12 19:02:51 -08:00
Angus Peart
60739968bd STM32F1: Support for I2C_OAR2 (Dual addressing) 2015-02-05 20:11:06 -08:00
Oliver Meier
7fbd49b3fc [stm32f4-ltdc] Helper function to wait for SRCR reload to complete 2015-02-05 16:44:38 -08:00
Oliver Meier
4b8f5e613b [stmf4-ltdc] added 3 spaces 2015-02-05 16:44:38 -08:00
Oliver Meier
3c9b07d776 [ltdc-stm32f4] add helper function to convert rgb565 to rgb888 2015-02-05 16:44:38 -08:00
Oliver Meier
c26831fab0 [stm32f4-stdc] fixed includes 2015-02-05 16:44:38 -08:00
Oliver Meier
eaae7731e9 [stm32f4-ltdc] initial commit 2015-02-05 16:44:38 -08:00
George McCollister
418fdd08dd usb: Prevent RX_CTR and TX_CTR from being cleared
When writing the USB endpoint register, USB_EP_RX_CTR (bit 15) and
USB_EP_TX_CTR (bit 7) should be set to avoid inadvertently clearing
either bit.

Prior to this patch end points could indefinately stall if the hardware
changed these bits between the time they are read and when they were
written.

Signed-off-by: George McCollister <george.mccollister@gmail.com>
2015-01-02 19:01:16 +00:00
George McCollister
9eb551c127 tools: Added *REG_BIT_MSK_AND_SET macros
Added CLR_REG_BIT_MSK_AND_SET and TOG_SET_REG_BIT_MSK_AND_SET because we
need version of CLR_REG_BIT_MSK and TOG_SET_REG_BIT_MSK that allow us to
OR in bits before the register is written.

Signed-off-by: George McCollister <george.mccollister@gmail.com>
2015-01-02 19:01:07 +00:00
Karl Palsson
8a15cec6bf stm32: f4: flash: support extended sector ranges
F42xx and F43xx have extended sector ranges.

Reported-by: H2OBrain@irc
2014-12-18 23:29:10 +00:00
Kuldeep Singh Dhaka
342ec6e9e3 [STM32F0] Add support functions for USB clock setup in F072 chips.
There is remaining an issue with PREDIV connected just after clock multiplexer (only F072). This should be fixed in another commit.
2014-12-18 23:43:04 +01:00
Kuldeep Singh Dhaka
331acce4fc [STM32F0] add support of autotrimming HSI to USB SOF frames
Signed-off-by: Frantisek Burian <BuFran@seznam.cz>
2014-12-18 23:43:04 +01:00
Karl Palsson
c09d2583dd stm32: f4: Add FLASH_OPTCR1 definition
This is required for stm32f42xx and stm32f43xx with second bank options.
2014-12-17 17:26:25 +00:00
Chuck McManis
14ad92015e Audit RTCPRE Shift and Mask Values
L0 - RTC Prescaler appears in RCC_CR, bit 20, 2 bits wide (RM0367 Rev 2)
L1 - RTC Prescaler appears in RCC_CR, bit 29, 2 bits wide (RM0038 Rev 10)
F0 - no prescaler setting (RM0091 Rev 7)
F1 - no prescaler setting (RM0041 Rev 4)
F2 - RTC Prescaler appears at RCC_CFGR, bit 16, 4 bits wide (RM0033 Rev 6)
F3 - no prescaler setting (RM0316 Rev 3)
F4 - RTC Prescaler appears at RCC_CFGR, bit 16, 4 bits wide (RM0090 Rev 8)
2014-12-14 16:29:03 -08:00
Chuck McManis
9ddfcb0e53 Rename rcc_ppre1_frequency and rcc_ppre2_frequency
Rename rcc_ppre1_frequency and rcc_ppre2_frequency to rcc_apb1_frequency and rcc_apb2_frequency
Also add rcc_ahb_frequency (although it is not set correctly in all cases) which will be fixed by
the rcc commits later. Also fixup the only use in the library of these variables, the USART code.

And fix the typos that resulted
Make l1 generic too
2014-12-13 19:49:04 -08:00
Chuck McManis
99f83eedcd stm32/f0: rcc.c Use common version instead of duplicate code.
Pulls out duplicate calls from f0/rcc.c and uses the common version which
also means that f0 can use rcc_peripheral_enable() now which is in common
but not the old rcc versions.
2014-12-03 11:14:26 +00:00
Karl Palsson
f51698fff4 stm32:l0: RCC: add osc_on/osc_off helpers
These are the routines that have custom switch cases, and aren't easy targets
for pulling out.
2014-12-03 11:13:39 +00:00
Karl Palsson
378069091a stm32:l0: Add RCC register definitions
Tested with a miniblink example on the l053 discovery board.

Only register definitions at this stage, no helpers.
Register definitions from RM0367r2, hopefully the biggest
superset of L0 parts.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2014-12-03 11:13:39 +00:00