26 Commits

Author SHA1 Message Date
Karl Palsson
c9c5cb7c9c style: fix some of the easier style bugs
No real changes.
2017-03-30 21:48:07 +00:00
Marcus Hultmark Varejao
6e87892a7e stm32f4: rcc: fix setup of main system clock with pllp
Fixes: 57c2b00a69f97205313e1c7ab8116ee1893b231e

There was an issue with the pllp value calculation where the masking was done
in the wrong place. The pllp value was always equivalent to 2 (the bits were
always set to 0b00) which could result in an undesired system clock frequency.
2016-09-02 10:33:27 +02:00
Karl Palsson
6c034c8981 stm32f4: rcc: fix compilation error missed in testing
Fixes: 57c2b00a69f97205313e1c7ab8116ee1893b231e

Running make for final sanity failed to catch this due to jobserver
issues.  *fumes*
2016-08-23 22:13:33 +00:00
Chuck McManis
57c2b00a69 stm32f4: rcc: support new plls for new f4 parts
Revise the PLL inits to support new and old PLL configurations,
particularly to support F4x9 devices.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2016-08-23 22:02:12 +00:00
Karl Palsson
08aac020ad stm32: rcc: provide async routines for osc checks
Start providing async routines for all blocking routines, to make it
easier to use libopencm3 in some RTOS environments.  This is not in
anyway intended to be complete, this just covers a single blocking
routine, rcc_wait_for_osc_ready.  Documentation added to the top level,
and provided for all stm32 families.
2016-08-18 23:41:04 +00:00
Chuck McManis
b802bd07b2 stm32f4: rcc: support PLL_SAI and PLL_I2S
Adds the missing enums for the extra clocks on stm32f4x9 parts.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2016-08-15 20:58:33 +00:00
Karl Palsson
cf7d0a08ca stm32: rcc_wait_for_sysclk_status should actually wait
Original implementation only checked whether the user had _selected_ the
clock, not whether it had actually switched to the clock or not.  For
almost all cases, this made this function either a no-op, if you _had_
selected the clock, or a blocking loop if you hadn't selected it ahead
of time.

Fixes github issue #687
2016-08-15 16:09:58 +00:00
Yiyu Zhu
05ff0df322 stm32f4: provide correct AHB frequency 2016-02-17 09:34:35 +00:00
Piotr Esden-Tempski
d680be81b5 [stm32f4] Remove rcc typedefs added prefixes to clock related enums.
Let's not hide the fact that these variables are structs/enums.

We are filling up the namespace badly enough, we should be prefixing as
much as we can with the module names at least. As users we already run
often enough in namespace colisions we don't have to make it worse.

* CLOCK_3V3_xxx enums renamed to RCC_CLOCK_3V3_xxx
* clock enums (PLL, HSI, HSE ...) prefixed with RCC_
* scale enum of pwr module prefixed with PWR_
2015-12-14 23:26:32 +01:00
Jorik Jonker
07ee71cf23 stm32f4: rcc: Add 84Mhz, max speed for f401
Basic helpers to at least support common configurations for the f401.

Original submission specified 5 wait states, but the reference manual and other
reviewers all believe that 2ws is sufficient for these modes.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2015-07-31 02:25:23 +00:00
Chuck McManis
9ddfcb0e53 Rename rcc_ppre1_frequency and rcc_ppre2_frequency
Rename rcc_ppre1_frequency and rcc_ppre2_frequency to rcc_apb1_frequency and rcc_apb2_frequency
Also add rcc_ahb_frequency (although it is not set correctly in all cases) which will be fixed by
the rcc commits later. Also fixup the only use in the library of these variables, the USART code.

And fix the typos that resulted
Make l1 generic too
2014-12-13 19:49:04 -08:00
Freek van Tienen
ac8ac8c64d [f4] Added a 25mhz clock 2014-10-15 17:27:18 +02:00
Ken Sarkies
7816501dbc Changes to the header includes for all STM32 peripherals
to remove variations, redundancies, add missing, fix errors. All c files
refer only to the dispatch style headers in /include/stm32. Those headers
#include memorymap.h and cm3/common.h. All references to
these are removed from the family specific headers. Ethernet untouched as
it appears incomplete.

Added dummy spi.c for F0/F3. Fix some doxygen anomalies.
2014-03-11 16:40:31 +00:00
BuFran
723e1a69bd Better method of reset and clock handling with RCC, support L1, F1, F2, F3, F4 2014-01-02 22:00:11 +01:00
Piotr Esden-Tempski
39fa9e4c58 Stile fixes run, 80 char boundry. 2013-06-12 21:07:35 -07:00
Piotr Esden-Tempski
34de1e776e Changed to use stdint types. 2013-06-12 19:11:22 -07:00
Piotr Esden-Tempski
7df63fcae0 First coarse run to fix coding style in locm3.
Added --terse and --mailback options to the make stylecheck target. It
also does continue even if it enounters a possible error.

We decided on two exceptions from the linux kernel coding standard:
- Empty wait while loops may end with ; on the same line.
- All blocks after while, if, for have to be in brackets even if they
  only contain one statement. Otherwise it is easy to introduce an
  error.

Checkpatch needs to be adapted to reflect those changes.
2013-06-12 18:22:56 -07:00
Gautier Hattenberger
a4b582f91d add 16MHz resonator for stm32f4 2013-04-23 17:52:27 +02:00
Karl Palsson
40d9d630f0 [flash] f4: use "proper" bit definition naming.
Part 4 of 4: updated f4 to use flash_<reg>_bit instead of just
flash_bit
2013-01-23 13:58:11 +00:00
Tomaz Solc
fc4047e4b4 Add assert macros to aid in debugging.
Adds libopencm3/cm3/assert.h header that provides assertion check macros
similar to those provided by the standard C library.

Thanks to Nicolas Schodet for help.
2012-10-02 08:48:45 +02:00
Piotr Esden-Tempski
43561de329 License change of the library to LGPL, version 3 or later.
Agreed to by all the significant contributors to the library.
2012-03-02 14:44:49 -08:00
Fergus Noble
5dce4172a8 Fix bug with F4 clock settings, change HPRE to PPRE. 2012-02-06 23:08:06 +01:00
Uwe Hermann
d97c937b8e lib: More small fixes. 2011-11-17 00:09:29 +01:00
Uwe Hermann
0d25aa3fcd lib/stm32/f4: Coding-style fixes. 2011-11-17 00:09:28 +01:00
Stephen Caudle
62c105abeb Fix APB1 & APB2 frequencies in STM32F4 RCC table 2011-11-02 14:26:33 -04:00
Stephen Caudle
5a89d44591 Add initial support for STM32F4 2011-10-31 00:41:19 -04:00