102 Commits

Author SHA1 Message Date
Karl Palsson
e121243ce2 usb: extract ST USB FS peripheral core. [BREAKING CHANGE]
The breaking changes here changes in header location, and changes in driver
name passed down to the usb stack.

Changes affect: stm32f102/f103, stm32l1, and some f3 parts

* instead of the confusingly generic "usb" use the name "st_usbfs" for the USB
  Full speed peripheral ST provides in a variety of their stm32 products.
  Include directives should change as:
      #include <libopencm3/stm32/usb.h> => <libopencm3/stm32/st_usbfs.h>

* instead of the confusingly specific "f103" name for the driver, use
  "st_usbfs_v1"  [BREAKING_CHANGE]

  Instead of:
    usbd_init(&stm32f103_usb_driver, .....) ==>
    usbd_init(&st_usbfs_v1_usb_driver, .....) ==>

The purpose of these changes is to reduce some confusion around naming, but
primarily to prepare for the "v2" peripheral available on stm32f0/l0 and some
f3 devices.

Work by Frantisek Burian, Kuldeep Singh Dhaka, Robin Kreis, fenugrec and zyp
on irc, and all those forgotten.
2015-10-03 01:32:34 +00:00
Karl Palsson
40cde559a7 stm32: f24: doxygen updates for flash program width.
More doxygen, more better.
2015-07-31 03:51:32 +00:00
Karl Palsson
ec15c1ca64 stm32: f24: flash: Make code match documentation
This removes the shift from the defines, and includes them in the helper
function, making the code match the documentation, and following how the
rest of the library commonly operates.

Code using the existing defines will continue to work.
2015-07-31 03:51:25 +00:00
Karl Palsson
3a106dbd10 stm32: spi: add more cross linking documentation 2015-05-25 13:03:23 +00:00
Kuldeep Singh Dhaka
c28d7bc187 stm32: spi: Standard mode selection
Allow setting cpol/cpha via standard mode numbers, instead of separate calls
for each bit.
2015-05-25 13:03:20 +00:00
Chuck McManis
fb1a365423 stm32: Disable SSOE if slave management is enabled
As called out by flixr, if you want slave select management then
you don't want SSOE active. This turns it off when enable_slave_management
is called.
2015-05-25 01:35:21 +00:00
Chuck McManis
f80bff2133 stm32: Fix common case SPI handling
The common case for SPI ports in master mode is that they are not
also running as Slaves some times. For these chips the SSOE bit must
be set (or NSS tied high). Since it is common for people to use a separate
GPIO to select remote slaves and they expect the master to always be the master
this sets that up by default.
2015-05-25 01:34:57 +00:00
Karl Palsson
5746fd4d25 stm32: common: Extract MCO source setting
This adds MCO source selection to some targets, and removes and standardizes
the mask/shift usage for all targets.  For devices that support MCO2, this
supports only MCO1.  No attempt has been made to extract MCO prescaler, which
is not available on all F1 and F3.
2015-04-29 01:22:27 +00:00
Piotr Esden-Tempski
8591a5aa20 [stm32-common-i2c] Style fix. 2015-02-05 20:14:29 -08:00
Angus Peart
b58ac190bb Fixed unwanted deletions... 2015-02-05 20:11:06 -08:00
Angus Peart
60739968bd STM32F1: Support for I2C_OAR2 (Dual addressing) 2015-02-05 20:11:06 -08:00
Piotr Esden-Tempski
98855af279 Indentation and style fix. 2015-02-05 19:13:49 -08:00
Chuck McManis
d7c83348c0 Doxygen fix
Timer docs were a bit out of date just brought them up to date
and added the Quadrature example.
2015-02-05 19:08:25 -08:00
Karl Palsson
8a15cec6bf stm32: f4: flash: support extended sector ranges
F42xx and F43xx have extended sector ranges.

Reported-by: H2OBrain@irc
2014-12-18 23:29:10 +00:00
Chuck McManis
9ddfcb0e53 Rename rcc_ppre1_frequency and rcc_ppre2_frequency
Rename rcc_ppre1_frequency and rcc_ppre2_frequency to rcc_apb1_frequency and rcc_apb2_frequency
Also add rcc_ahb_frequency (although it is not set correctly in all cases) which will be fixed by
the rcc commits later. Also fixup the only use in the library of these variables, the USART code.

And fix the typos that resulted
Make l1 generic too
2014-12-13 19:49:04 -08:00
Karl Palsson
67f4f50a94 stm32: common: fix missing SPI_I2S_BASE rename regression
Fix regresion from 5d4437fe43aa68a28611e9a0aecc712833230304 where
somehow not all occurrences were replaced.  I could swear it all
compiled when I was working on it :(

Reported-by: Trevor Woerner <trevor.woerner@linaro.org>
2014-10-08 14:32:05 +00:00
Michael Spieler
50dd1c5725 stm32: gpio_toggle: ensure correct state of non-toggled pins. 2014-10-07 12:01:04 +00:00
Karl Palsson
4c190a3fa3 stm32: i2c: actually keep bit 14 set as per datasheet.
Old code did three writes, new way actually seems to follow datasheet
properly.
2014-10-07 11:25:02 +00:00
Karl Palsson
5d4437fe43 stm32/spi: Replace all SPIx_I2S_BASE with SPIx_BASE
Latest versions of all reference manuals refer to the address as SPIx_BASE, and
simply name some of the individual registers as SPI_I2SXXXX.  Likewise, the
interrupts are simply SPIx, not SPIx/I2Sx.  Rather than hacking more duplicates
into the F0 and L0 parts where this was turning up, remove the pointless _I2S_
from SPI2/SPI3 and make it all consistent

Compile tested only, with the examples collection.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>

Fixes #331
Fixes #347
2014-10-07 11:21:40 +00:00
Norbert Braun
884924d598 stm32: timers: fix mixup between TIMx_CCMR1 and TIMx_CCMR2 in timer_set_oc_mode() 2014-08-04 15:38:01 +02:00
Karl Palsson
af3389652c stm32: timers: Fix edge polarity setup
The CCxP/CCxNP bits are actually separated by a reserved bit, so the
correct mask is 0xa, (0b1010) not 0x6 (0b0110)

Reported by PyroDevil on the mailinglist
2014-07-15 13:28:02 +00:00
Felix Ruess
f6b6d62ec5 [stm32] fix dox for rcc_periph_x
closes #329
2014-06-28 02:40:36 +02:00
Felix Ruess
f49c1f264a [stm32] fix i2c_reset
rcc_periph_reset_pulse needs RST_I2Cx instead of RCC_I2Cx as argument
see also #329
2014-06-26 00:05:46 +02:00
Felix Ruess
c01f9ee323 [stm32] implement i2c_reset using rcc_periph_reset_pulse
this also adds support for I2C3 in i2c_reset
2014-06-11 12:58:05 +00:00
Karl Palsson
b37597f1db stm32/dac: Follow ref-man guidelines on GPIO config
GPIO pins should be configured for Analog IN on virtually all families
to reduce parasitic consumption.

Reported-by: Roger Wolff <R.E.Wolff@BitWizard.nl>
2014-05-19 10:29:11 +00:00
Roger Wolff
a99e3a2cd3 stm32/flash: Make comments match reality
Copy/paste commentary with wrong sizes.
2014-05-19 10:21:56 +00:00
Frantisek Burian
14f1ac4764 stm32: common: SPI: Fix spi_common_all warning
Fixes #226

This function should be deprecated in the future.
2014-03-11 21:13:03 +00:00
Frantisek Burian
bf01d890f6 [STM32F0] Add support for timers.
This commit has been based on kuldeepdhaka's pioneer work, but it was reformatted to apply libopencm3 inclusion tree correctly.

timer_common_all.c now supports new rcc_periph_reset_pulse function for all families.
2014-03-11 16:49:01 +00:00
Ken Sarkies
7816501dbc Changes to the header includes for all STM32 peripherals
to remove variations, redundancies, add missing, fix errors. All c files
refer only to the dispatch style headers in /include/stm32. Those headers
#include memorymap.h and cm3/common.h. All references to
these are removed from the family specific headers. Ethernet untouched as
it appears incomplete.

Added dummy spi.c for F0/F3. Fix some doxygen anomalies.
2014-03-11 16:40:31 +00:00
R.E. Wolff
fbf8c19ea4 stm32: dac: buffer enable bits were inverted. 2014-02-17 15:19:22 +00:00
Ken Sarkies
0af6d06eda Deduplication of flash code for STM32F0 and F1.
Extension of code for STM32F1 to allow for dual bank series XL.
Small changes to documentation for F2, F4 and L1 to add a parameter reference.

Tested with STM32F103RBT6
(note: tests show that the PG bit must be cleared after programming, otherwise
a subsequent erase attempt fails. This has been added to flash_program_half_word
for F0 and F1 only. A fix for the other families is not included in this PR.)
2014-02-06 00:52:42 +01:00
Karl Palsson
27bc12de61 stm32: unify bulk of adc convenience functions
This unifies stm32f1, l1, and f4 convenience functions for adc.  The code
should be useable for f2 and f37x as well, but that needs hardware for testing,
and there was no existing implementation. This is the reason for the
"adc_common_v1.c" name, as trying to put all the different families into the
common file name has become too cumbersome.

All of the deprecated routines have been dropped, they've been marked
deprecated for a very long time now, and porting them seemed unnecessary.

This has been tested on f1, l1 and f4 discovery boards, and is based on some
existing l1/f1 unification code from
https://github.com/karlp/libopencm3/tree/rme_l1_master
2014-02-05 10:39:00 +00:00
memeruiz
cf21290488 [stm32f3] Moving common f0 an f3 functions together. New init_master function. 2014-02-01 21:11:58 +01:00
Ken Sarkies
3c6e9fd56d Fix a number of top level doxygen issues.
So that the navigation pane works correctly in browsers.
Some additional doc fixes put in where found (but many more still to go).
Added some dummy .c and .h files to bring the associated docs into line.
makefile changed to allow 'make html' as well as 'make doc' (the latter only does html anyway).
2014-01-15 22:19:52 +01:00
Ken Sarkies
a54a12e1c9 Documentation added to flash modules for all STM32 families. 2014-01-15 22:09:36 +01:00
Piotr Esden-Tempski
a909b5ca9e [Style] Global style fix run. 2014-01-03 01:07:30 +01:00
a1ien
67efedec54 [STM32F2-F4:CRYPTO]Fix hash_set_last_word_valid_bits() 2014-01-02 22:17:46 +01:00
BuFran
723e1a69bd Better method of reset and clock handling with RCC, support L1, F1, F2, F3, F4 2014-01-02 22:00:11 +01:00
podhrmic
dfeeda24ba [timers] Fixed typo
- Bit shift should be 2, not 4 (see the datatsheet - TIMx_CMMR2 register)
2013-11-08 16:00:51 -07:00
Karl Palsson
5cbf5619a1 [stm32] Unify f0/f3 SPI and correct all makefiles
The common code wasn't being included in L1 builds, even though the headers now
included the correct definitions.

This combines the two f0 and f3 spi files, which previously differed only in
the number of spi peripherals defined.

Files were renamed to the full "l1f124" style, not because I like it, but
because it's the convention we have, so it's best to apply it rigourously.

Tested on L1 and F100 boards, compile tested only for others, but the examples
repository all compiles too.  (Though the lack of SPI examples for all
platforms was how this broke in the first place)
2013-11-07 21:50:48 +00:00
BuFran
d63bf5ac64 [STM32F3:doc] Add doxygen documentation page to output 2013-08-22 23:08:52 -07:00
BuFran
efc2489d2c [Stylecheck] Code cleaned to current stylecheck script 2013-08-22 17:18:41 -07:00
BuFran
210a17ec97 [STM32F0:SPI] Add initial support 2013-08-22 17:18:41 -07:00
BuFran
1345a3403c [STM32F0:EXTI] Add prelimnary support of exti, common file now in common directory 2013-08-22 17:18:39 -07:00
BuFran
4bb18baa59 [STM32F0:RTC] Renamed common files to be consistent to file naming scheme 2013-08-22 17:18:38 -07:00
BuFran
cc4c164ebe [STM32F0:DMA] Renamed common file to meet all supported families, added missing files 2013-08-22 17:18:37 -07:00
BuFran
eb7d29e115 [STM32F0:GPIO] File renamed to meet the content 2013-08-22 17:18:36 -07:00
Piotr Esden-Tempski
7085867db6 [STM32F3] Split timer common f24 into f234 and f24. 2013-07-07 16:01:52 -07:00
Piotr Esden-Tempski
590135b65f [STM32F3] Moved all F3 specific functions out of common. 2013-07-07 16:01:51 -07:00
Piotr Esden-Tempski
18da63879c [STM32] Rename the f0124 files to f124.
We don't support f0 yet so let's not fool anyone. We may rename those
files back again if when we cross check that it is actually true this
file supports f0.
2013-07-07 16:01:51 -07:00