Karl Palsson
3f0bbf6153
[SCB] More useful definitions for SHPR fields
...
The direct access definitions to the SHPR1 SHPR2 and SHPR3 were simply
wrong, and though a handy macro for directly reaching any priority field
was provided, the definitions of the fields assumed direct access to the
registers.
Provide field definitions that match the handy macro, and correct the
direct access definitions for people wishing to use them.
2013-08-22 23:14:30 -07:00
BuFran
d63bf5ac64
[STM32F3:doc] Add doxygen documentation page to output
2013-08-22 23:08:52 -07:00
Piotr Esden-Tempski
f797c50b6a
[Style] Fixed line length.
2013-08-22 22:54:30 -07:00
BuFran
65eaad938f
[Style] checked and corrected
2013-08-22 22:29:40 -07:00
BuFran
c6f861139d
Removed mostly copied code
...
REG1 REG2 REG3 -> REGx
2013-08-22 22:29:40 -07:00
BuFran
d3a073d9b5
[Style] Corrected many style errors (mainly line too long)
2013-08-22 22:29:40 -07:00
BuFran
7a78c7e535
[Cortex] Correct operator precedence in BitBand address computation
2013-08-22 17:18:42 -07:00
BuFran
e19270b3bf
[STM32F0:ADC] Add supporting functions to the module
2013-08-22 17:18:42 -07:00
BuFran
81982916e2
[Doxygen] Add complete documentation page to STM32F0
2013-08-22 17:18:42 -07:00
BuFran
4ff19fa2b4
[Style] Unified commenting style on F0
2013-08-22 17:18:41 -07:00
BuFran
efc2489d2c
[Stylecheck] Code cleaned to current stylecheck script
2013-08-22 17:18:41 -07:00
BuFran
210a17ec97
[STM32F0:SPI] Add initial support
2013-08-22 17:18:41 -07:00
BuFran
72f38401c0
[STM32F0:I2C] Add register definitions
2013-08-22 17:18:40 -07:00
BuFran
662aace389
[STM32F0:TSC] Add register definitions
2013-08-22 17:18:40 -07:00
BuFran
7487a22c7e
[STM32F0:CEC] Add register definitions
2013-08-22 17:18:40 -07:00
BuFran
9952768c42
[STM32F0:DAC] Add register definitions
2013-08-22 17:18:39 -07:00
BuFran
a073758cb4
[STM32F0:ADC] Add register definitions
2013-08-22 17:18:39 -07:00
BuFran
1345a3403c
[STM32F0:EXTI] Add prelimnary support of exti, common file now in common directory
2013-08-22 17:18:39 -07:00
BuFran
cd9ba87073
[STM32F0:SYSCFG] Add support for SYSCFG. Old file moved to common directory for L1 and F234
2013-08-22 17:18:39 -07:00
BuFran
9f8dd28a5c
[STM32F0:COMP] Add preliminary support of module
2013-08-22 17:18:38 -07:00
BuFran
4bb18baa59
[STM32F0:RTC] Renamed common files to be consistent to file naming scheme
2013-08-22 17:18:38 -07:00
BuFran
cc4c164ebe
[STM32F0:DMA] Renamed common file to meet all supported families, added missing files
2013-08-22 17:18:37 -07:00
BuFran
8b0656459b
[STM32F0:DMA] Add initial support
2013-08-22 17:18:37 -07:00
BuFran
62a8aca04a
[STM32F0:RTC] Add initial support
2013-08-22 17:18:37 -07:00
BuFran
c99be0fb96
[STM32F0:IWDG] Add initial support
2013-08-22 17:18:37 -07:00
BuFran
fc02aa6162
[STM32F0:USART] Add support for USART peripheral
2013-08-22 17:18:36 -07:00
BuFran
18c4d299c1
[STM32F0] Add preliminary support for the family
2013-08-22 17:18:35 -07:00
BuFran
e1ebcc9da8
[Cortex] Add preliminary support for core-dependent defines ARMv6m / ARMv7m, ARMv7em
2013-08-22 17:18:35 -07:00
Ben Gamari
2a588f11aa
lpc43xx/ssp; Add DMACR fields
2013-07-10 23:35:08 -04:00
Piotr Esden-Tempski
f4cd74a741
[STM32F3] When removing typedefs do it right...
...
and don't declare variables while doing it so that everything starts
exploding as soon as you use the header more then once.
2013-07-07 21:55:31 -07:00
Ben Gamari
5d4f759c92
lpc43xx/timer: Add timer utilities
2013-07-07 18:50:44 -07:00
Ben Gamari
9d89df0db6
lpc43xx/timer: Add register definitions
2013-07-07 18:50:35 -07:00
Ben Gamari
bbde1012a3
stm32/f4/adc: Fix set_resolution
...
I can only imagine the resolution argument was 16 bits due to some cut
and paste error
2013-07-07 17:22:13 -07:00
Ben Gamari
d2ce9c0827
cortex: Add cc_[en|dis]able_interrupts
2013-07-07 17:21:29 -07:00
Alexandru Gagniuc
5ea4763845
lm4f: Appease checkpath.pl and de-typedef enums
...
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-07-07 16:33:18 -07:00
Piotr Esden-Tempski
dbee693b12
[STM32] The exti20-22 are also available on l1.
2013-07-07 16:01:52 -07:00
BuFran
68ee13be4b
Doxygen style blocks corrected
2013-07-07 16:01:52 -07:00
Piotr Esden-Tempski
62e6635992
[Style] Fixed style in the newly added F3 code.
2013-07-07 16:01:52 -07:00
Piotr Esden-Tempski
b6231dbb49
[Style] Do not define types if not necessary.
2013-07-07 16:01:52 -07:00
Piotr Esden-Tempski
74eb5ab84a
[STM32F3] Split out F3 specific exti definitions.
2013-07-07 16:01:51 -07:00
Piotr Esden-Tempski
09532f7c26
[STM32F3] Removed F3 specific stuff from the common all header.
2013-07-07 16:01:51 -07:00
Piotr Esden-Tempski
18da63879c
[STM32] Rename the f0124 files to f124.
...
We don't support f0 yet so let's not fool anyone. We may rename those
files back again if when we cross check that it is actually true this
file supports f0.
2013-07-07 16:01:51 -07:00
Piotr Esden-Tempski
ebb058825f
[STM32F3] Removed all specific F3 stuff out of common files.
2013-07-07 16:01:51 -07:00
Piotr Esden-Tempski
a1321fc21f
[STM32] Split apart gpio f234 into f234 and f24.
2013-07-07 16:01:51 -07:00
Piotr Esden-Tempski
f8734dfcd3
[STM32F3] Move the f3 specific stuff out of common.
2013-07-07 16:01:50 -07:00
Federico Ruiz Ugalde
41ea714f53
stm32f3: changed clock_t to rcc_clock_t in rcc to avoid stdio collision.
2013-07-07 16:01:50 -07:00
Federico Ruiz Ugalde
60bdf4eebd
stm32f3: f1 usb header files moved to stm32 root directory.
...
- Now the f1 usb header files serve both the f1 and f3.
- usb_f103 modified to find the new headers file location.
2013-07-07 16:01:50 -07:00
Federico Ruiz Ugalde
934c8dbf4c
stm32f3: Usb support added. usb unit is the same as f103.
...
- memorymap value for usb base changed to the one expected by the
f103 usb code.
- f3 Makefile updated to build the f102 usb code.
2013-07-07 16:01:50 -07:00
Federico Ruiz Ugalde
59b2b5da87
stm32f3: Some additions to rcc.
...
- Additional frequency configuration (48Mhz, for usb use!)
- FLASH latency decreased (too unnecessarily low before)
- Rcc functions to change usb freq prescaler.
2013-07-07 16:01:50 -07:00
Federico Ruiz Ugalde
011124c33f
stm32f3: i2c support increased. Now it works.
...
- Several functions added (that only work on the f3)
- The data register now has a 8bit access counter part
that is necessary for 8bit transmissions, together with
the access functions.
- The init master functions doesn't work for the f3.
2013-07-07 16:01:50 -07:00
