26 Commits

Author SHA1 Message Date
Frantisek Burian
6de1b50c4e [BUILD] Fix the correct make behavior if compiling inside tree
On linux, the output of CP rule was try to write to / which is - of course, forbidden for write.

This solution adds to each part of lib correct pointer to the root of lib where the libs should be written.

Bug found by Kuldeep Singh Dhaka.
2014-02-12 15:27:03 +00:00
Frantisek Burian
fc9a7260c2 [F0] Add new peripheral Clock Recovery Subsystem as defined in RM0091 Rev. 5 2014-02-07 07:46:54 +01:00
Frantisek Burian
55750d5dc6 [F0] Updated RCC module to be compatible wih RM0091 Rev. 5 2014-02-07 07:46:53 +01:00
Frantisek Burian
8d5ad52e0f Fix the stm32f0 evident bugs 2014-02-06 11:23:01 +01:00
Ken Sarkies
0af6d06eda Deduplication of flash code for STM32F0 and F1.
Extension of code for STM32F1 to allow for dual bank series XL.
Small changes to documentation for F2, F4 and L1 to add a parameter reference.

Tested with STM32F103RBT6
(note: tests show that the PG bit must be cleared after programming, otherwise
a subsequent erase attempt fails. This has been added to flash_program_half_word
for F0 and F1 only. A fix for the other families is not included in this PR.)
2014-02-06 00:52:42 +01:00
memeruiz
cf21290488 [stm32f3] Moving common f0 an f3 functions together. New init_master function. 2014-02-01 21:11:58 +01:00
Ken Sarkies
3c6e9fd56d Fix a number of top level doxygen issues.
So that the navigation pane works correctly in browsers.
Some additional doc fixes put in where found (but many more still to go).
Added some dummy .c and .h files to bring the associated docs into line.
makefile changed to allow 'make html' as well as 'make doc' (the latter only does html anyway).
2014-01-15 22:19:52 +01:00
Ken Sarkies
a54a12e1c9 Documentation added to flash modules for all STM32 families. 2014-01-15 22:09:36 +01:00
Piotr Esden-Tempski
a909b5ca9e [Style] Global style fix run. 2014-01-03 01:07:30 +01:00
Onno Kortmann
fe6b542357 STM32F0: Correctly clear pll source bits. 2013-12-16 19:42:21 +00:00
Onno Kortmann
f622437cfb STM32F0: Fix PLL multiplication factor for 48MHz setup
It was set to overclocking configuration!
2013-12-16 19:37:07 +00:00
Onno Kortmann
868d65d872 STM32F0: Turn on PLL clock source when asked to
The STM32F05xxx/06xxx manual describes on p.98 (Sec 7.4.1) the RCC_CR
register, on which it says that bit 24 is the PLLON bit which has to be
enabled before using the PLL. This causes the PLL to be enabled with
rcc_osc_on(PLL).
2013-12-16 19:37:06 +00:00
BuFran
e19270b3bf [STM32F0:ADC] Add supporting functions to the module 2013-08-22 17:18:42 -07:00
BuFran
81982916e2 [Doxygen] Add complete documentation page to STM32F0 2013-08-22 17:18:42 -07:00
BuFran
210a17ec97 [STM32F0:SPI] Add initial support 2013-08-22 17:18:41 -07:00
BuFran
1345a3403c [STM32F0:EXTI] Add prelimnary support of exti, common file now in common directory 2013-08-22 17:18:39 -07:00
BuFran
9f8dd28a5c [STM32F0:COMP] Add preliminary support of module 2013-08-22 17:18:38 -07:00
BuFran
4bb18baa59 [STM32F0:RTC] Renamed common files to be consistent to file naming scheme 2013-08-22 17:18:38 -07:00
BuFran
cc4c164ebe [STM32F0:DMA] Renamed common file to meet all supported families, added missing files 2013-08-22 17:18:37 -07:00
BuFran
8b0656459b [STM32F0:DMA] Add initial support 2013-08-22 17:18:37 -07:00
BuFran
62a8aca04a [STM32F0:RTC] Add initial support 2013-08-22 17:18:37 -07:00
BuFran
c99be0fb96 [STM32F0:IWDG] Add initial support 2013-08-22 17:18:37 -07:00
BuFran
4e566bf8b1 [STM32F0] Add FP_FLAGS to support #159 2013-08-22 17:18:36 -07:00
BuFran
eb7d29e115 [STM32F0:GPIO] File renamed to meet the content 2013-08-22 17:18:36 -07:00
BuFran
fc02aa6162 [STM32F0:USART] Add support for USART peripheral 2013-08-22 17:18:36 -07:00
BuFran
18c4d299c1 [STM32F0] Add preliminary support for the family 2013-08-22 17:18:35 -07:00