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840 Commits

Author SHA1 Message Date
Karl Palsson
2d0d29d946 doc: stm32l1: timer: fix params, missing groupings 2019-06-17 22:33:32 +00:00
Guillaume Revaillot
7d344b187d stm32: dma: add dma_set_channel_request to ease dma cselr usage. 2019-06-17 11:44:44 +00:00
Guillaume Revaillot
eb0bc099f4 stm32l0: dma: include dma_cselr, present on l0x1-2-3. 2019-06-17 11:44:44 +00:00
Guillaume Revaillot
e06898d9a4 stm32: dma: cselr: factorize register definition. 
F09x and L4 share the same cselr register, as well as some L0s, factorize
definitions in a new shared header and add helpers.

fyi, that register allows to redefine dma channel peripheral mapping - see
device datasheet for mapping tables.
 2019-06-17 11:44:44 +00:00
Karl Palsson
19f1160ad1 doc: stm32: timer: remove redundant groupings and consistent names 2019-06-16 18:17:06 +00:00
Karl Palsson
0b0a4de7c2 doc: stm32l0: fix doxygen groupings. 
Makes some @ingroup directives redundant.
 2019-06-16 18:02:41 +00:00
Guillaume Revaillot
594c354068 stm32: l0: timer/lptimer: doc+ 
better doc for l0 lptimer registers, add mask.
 2019-06-16 09:48:34 +02:00
Guillaume Revaillot
ab1b0c1a5e stm32g0: exti doc fixup 2019-06-13 12:04:58 +02:00
Guillaume Revaillot
8173fb7249 stm32g0: add timer. 
Only tim2/3/7/14 have been really tested yet - but the others should
work as well.
 2019-06-13 12:04:58 +02:00
Guillaume Revaillot
74526f00cc stm32g0: add crc. 
Regular crc-v2 peripheral, except that CRC_IDR is now 32bit wide - but
not used.
 2019-06-13 12:04:58 +02:00
Guillaume Revaillot
38006c3c82 stm32g0: add rng. 
Regular rng peripheral, with one additional bit : clock error detection
apparently available on l4 chips).  Curiously, Clock error detection is
_disabled_ when bit is set, but bit is cleared by default, so peripheral
/ clock error detection behaves like all other chips..

NB: RNG need proper rcc_ccicr_rngsel bits set to work, no clock is set by
default. Note also that on that chip fRNGCLK must be higher than fHCLK/32
 2019-06-13 12:04:58 +02:00
Guillaume Revaillot
5a349d3ab6 stm32g0: add i2c. 
Regular i2c peripheral.
Partially tested as i had no i2c slave on hand, but i can see i2c on my scope..
 2019-06-13 12:04:58 +02:00
Guillaume Revaillot
ba3b50a4ad stm32g0: add spi. 
classic "common" spi + frf bit spi peripheral.
As for i2c, i could only check signals on scope, no spi slave to check, but looks ok.
 2019-06-13 11:56:20 +02:00
Guillaume Revaillot
a51ecb4719 stm32g0: add usart. 2019-06-13 11:56:20 +02:00
Guillaume Revaillot
bb98d0755c stm32g0: add iwdg. 
regular v2 iwdg.
 2019-06-13 11:07:53 +02:00
Eric Van Albert
3d422a930f stm32l4: add common DAC support 
Replace the DAC1_BASE style, only used on l4 with the standard DAC_BASE
used on all other targets.

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
 2019-06-12 23:25:22 +00:00
Karl Palsson
9f58ad4393 doc: fix trivial missing trailers or typos 2019-06-12 23:16:58 +00:00
Karl Palsson
55c899c93b doc: stm32l0: rcc: add groups requested by existing docs 
And cleanse the arguments to all match the docs.
 2019-06-12 23:06:28 +00:00
Karl Palsson
7b6ca4be6b doc: stm32l0: rcc: add groups and tags for bus prescalers 2019-06-12 23:06:28 +00:00
Karl Palsson
a2681b3122 doc: stm32f4: crypto trivial closing tag fix 2019-06-12 23:06:27 +00:00
Karl Palsson
502593ca6f doc: stm32: exti-v1: fix conditionals, add registers 
Fixes some missing definitions.  cond/endcond is hard to get right
sometimes!
 2019-06-12 23:06:22 +00:00
Karl Palsson
867bd164eb doc:stm32: usart: fix grouping and heirarchy of base addrs 
They were always landing on the top level, or not even present.
 2019-06-12 23:06:22 +00:00
Karl Palsson
cfdb9b7856 doc: stm32f0: rcc: add groups and tags for bus prescalers 2019-06-12 23:06:22 +00:00
Karl Palsson
121d854841 doc: stm32: crc-v2 fix up markup for doxygen 
Eliminates errors, fixes groupings, adds missing groupings.
 2019-06-12 23:06:22 +00:00
Karl Palsson
7c0320bf21 doc: stm32g0: rcc: add groupings for periph resets 2019-06-12 23:06:22 +00:00
Karl Palsson
4129d89637 doc: stm32f7: rcc: add groupings for periph resets 2019-06-12 23:06:22 +00:00
Karl Palsson
5d3f13c40e doc: stm32f4: rcc: add groupings for periph resets 2019-06-12 22:56:38 +00:00
Karl Palsson
64893177ed doc: stm32f3: rcc: add groupings for periph resets 2019-06-12 22:56:38 +00:00
Karl Palsson
5ba8d94b81 doc: stm32l4: rcc: add groupings for periph resets 
As we did with f2, use a parent grouping to contain the different sets
of APB1 fields.
 2019-06-12 22:56:38 +00:00
Karl Palsson
e6e1c239e4 doc: stm32l0: rcc: add groupings for periph resets 2019-06-12 22:56:38 +00:00
Karl Palsson
da3466057b doc: stm32f2: rcc: add groupings for periph resets 
We use a parent grouping to make the generic "AHB" groups work, even
though F2 and many later families have AHB1, AHB2 and AHB3
 2019-06-12 22:56:34 +00:00
Karl Palsson
21a0c1178c doc: stm32l1: rcc: add groupings for periph resets 2019-06-12 21:56:13 +00:00
Karl Palsson
c7ce1ddd1a doc: stm32f0: rcc: add groupings for periph resets 
As done earlier for other families, makes the doxygen linking working
properly.
 2019-06-12 21:56:13 +00:00
Karl Palsson
ce5d1ca9a2 doc: restore targets as pages. 
You can't have two mainpage items, and the second was just being
ignored.  This restores them, which makes the left side list longer,
which we may or may not like, but it's at least how it was documented to
be.
 2019-06-10 11:10:34 +00:00
Guillaume Revaillot
a652856533 stm32l0: rcc: add rcc_set_peripheral_clk_sel(periph, sel) 2019-06-03 22:29:45 +00:00
Guillaume Revaillot
8668f9198b stm32l0: rcc: add peripherals clock source selection helpers. 2019-06-03 22:29:45 +00:00
Guillaume Revaillot
6953138a28 stm32l0: add rcc_set_msi_range. 2019-06-03 22:29:45 +00:00
Karl Palsson
d0c3678f74 stm32l4: rcc: drop bad function prototype 
This was introduced by a bad merge/rebase leaving a dangling header
definition.

Fixes: b8424263 stm32:l4: rcc: Add RTC clock functions
 2019-06-02 22:27:15 +00:00
Bruno Randolf
b8424263e8 stm32:l4: rcc: Add RTC clock functions 2019-06-02 22:18:05 +00:00
Bruno Randolf
2c1823f7bb stm32:l4: pwr: Add en/disable_backup_domain_write_protect() 2019-06-02 22:18:05 +00:00
Bruno Randolf
a1f58ea8ae stm32:l4: Add interrupts for STM32L4x5/STM32L4x6 
Add all interrups from RM0351
 2019-06-02 22:18:05 +00:00
Bruno Randolf
fe722d4643 stm32:l4: rcc: Add helper functions 
Add functions for PLL output and 48MHz clock source selection
 2019-06-02 22:18:05 +00:00
Bruno Randolf
a1ffdc59f0 stm32:l4: flash: Program in double words 
According to RM0351 and RM0394 flash needs to be programmed by double words.
Also fix flash_program() which was wrong anyways.

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
 2019-06-02 22:17:55 +00:00
Karl Palsson
49a3cddba0 stm32f4:rcc: add new api directly to deprecated message 
This makes the compiler warnings more useful.
 2019-06-02 20:36:57 +00:00
Karl Palsson
f990030440 stm32f4: rcc: move deprecated attribute to header 
This makes it actually generate deprecated warnings.  The deprecated
doxygen stays with the .c file as before.
 2019-06-02 12:50:34 +00:00
Karl Palsson
a9dde2832e stm32f4: rcc: drop 48 & 120 MHz configs 
48Mhz has no purpose other than to be a naiive method of haivng working
USB.  120MHz never had any purpose, other than to match the f2 code it
was copied from.  Drop them both.  Remaining configs are all max speeds
for various F4 parts.  Lower speeds are all custom
 2019-06-02 10:50:10 +00:00
Miguel Sánchez de León Peque
1d68c299e8 stm32f4: add HSI clock configurations 2019-06-02 10:39:18 +00:00
Miguel Sánchez de León Peque
ca6dcfbea1 stm32f4: rcc: support hsi pll source 2019-06-02 10:38:43 +00:00
Matthew Lai
eed780e2c1 stm32f7: irqs: Fix typo in i2c4* 
This also unifies the whitespace in the file.

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
 2019-05-26 21:34:08 +00:00
Karl Palsson
0aef9c2ec6 stm32: doc: pwr: move to peripheral_api 
Some families had partially moved to peripheral api, and others were
only documenting common code, but not specific code.  Delete dummy .c
files, and check that all specific apis are also being documented, not
just common apis.
 2019-05-22 00:10:39 +00:00