128 Commits

Author SHA1 Message Date
Karl Palsson
c9c5cb7c9c style: fix some of the easier style bugs
No real changes.
2017-03-30 21:48:07 +00:00
Matthew Lai
b1839265f9 stm32: syscfg: fixed copy and paste error in comment 2017-02-28 16:57:09 +00:00
Lixing Ding
13fe431919 stm32: timer: fix TIM_CCMR2 definitions
CC3S and CC4S channel names were badly copy/pasted from CCMR1
2017-02-15 09:55:24 +00:00
Karl Palsson
23cf491501 stm32: adc-v2: extract common calibration code
Extract the calibration code from the f0, and share it with the other
adc-v2 peripheral users (f0,l0,f3,l4)

Uses the same naming set of is/async naming conventions requested by the
RTOS guys instead of having blocking only calls.

Old code:
	adc_calibrate_start(ADC);
	adc_calibrate_wait_finish(ADC);

New code (blocking):
	adc_calibrate(ADC);

New code (asynch):
	adc_calibrate_async(ADC);
	// do stuff
	adc_is_calibrating(ADC);  // will be false when it's finished.

Old code for f0 is still available, but marked deprecated.
2016-09-12 23:29:12 +00:00
Karl Palsson
41fa001620 doc: adc: fix syntax and missing groupings 2016-08-18 23:51:49 +00:00
Karl Palsson
34c3a64177 doc: stm32l power: properly include and document
Was missing group markers.
2016-08-18 23:51:48 +00:00
Karl Palsson
08aac020ad stm32: rcc: provide async routines for osc checks
Start providing async routines for all blocking routines, to make it
easier to use libopencm3 in some RTOS environments.  This is not in
anyway intended to be complete, this just covers a single blocking
routine, rcc_wait_for_osc_ready.  Documentation added to the top level,
and provided for all stm32 families.
2016-08-18 23:41:04 +00:00
Karl Palsson
4eb51ecaea stm32: rcc: rcc_wait_for_osc_ready is always available
Move the prototype to the common_all header and include documentation.
2016-08-18 23:41:04 +00:00
Cem Basoglu
6b5150a4dc stm32: usart-v2: Extended USART functions (data/pin inversion, half duplex)
Includes receive timeout, all inversions and duplex and convenience functions.

Applies for F0 and F3 so far.
2016-04-01 22:49:18 +00:00
Karl Palsson
a3998563cd NOUP: FIXME: flag next work 2016-03-30 16:59:58 +00:00
Karl Palsson
1755098617 stm32: adc-v2: pull up voltage regulator control.
L4 and F3 actually have the same bits to write in the same order, but F3 hides
the name of the deep power down bit.  Keep the like that for now, but there's a
standard API for enabling and disabling the regulator.
2016-03-30 16:59:56 +00:00
Karl Palsson
f40e34680b stm32: adc-v2: pull up regular sequence setting.
Uses more standardized naming, fills in some missing defintions, removes some
redundant definitions.
2016-03-30 16:59:56 +00:00
Karl Palsson
81319a96fb stm32: adc-v2: pull up start_regular
Little steps are easy to review, and easy to test.
2016-03-30 16:59:56 +00:00
Karl Palsson
8b7a5ce7aa stm32: adc-v2: pull up function prototypes
These are standard "api" level functions that need per target implementations,
but should all maintain the same signature.
2016-03-30 16:59:56 +00:00
Karl Palsson
5063ea0db7 stm32: adc-v2: pull up overrun and EOC flag methods
EOS vs EOSEQ is really a single/multi variant difference, so leave it out.
2016-03-30 16:59:56 +00:00
Karl Palsson
b2af9e632c stm32: adc-v2: Pull up more common basic functionality
Pull up eoc/eos/read_regular functions.  More simple, basic core functionality.
2016-03-30 16:59:56 +00:00
Karl Palsson
f1d50d24be stm32: adc-v2: pull up more common functionality
More easy bit on/off settings.  Every piece that gets pulled up here becomes
automatically available for l0/l4 when they land
2016-03-30 16:59:56 +00:00
Karl Palsson
f67e217ffb stm32: adc-v2: Pull up the two forms of the adc-v2
The adc v2 periph has the same register map, but comes in two flavours, one
supporting injected channels, more watchdogs, per channel sampling times and
so on, and one "simple" version.

Pull up the f3 and f0 portions into the appropriate files, after comparing with
L0 and L4 reference manuals, even if those are not fully landed yet.
2016-03-30 16:59:56 +00:00
Karl Palsson
4c550648c3 stm32: adc-v2: pull up common register definitions 2016-03-30 16:59:56 +00:00
Karl Palsson
1d090c840f stm32: adc-v2: pull up temp/vref switches
Common for f0,f3,l0,l4
2016-03-30 16:59:55 +00:00
Karl Palsson
7231b9a691 stm32: adc-v2: pull up single/continuous modes 2016-03-30 16:59:55 +00:00
Karl Palsson
a89cd86454 stm32f0/f3: adc: extract beginnings of common v2 periph
The f0, f30x and l0 have a very similar "v2" adc peripheral.
Start extracting out some of the common code, and fix the glaring bug in
adc_power_down that was affecting them both.

This is not intended to be a fully comprehensive extraction, just the first
easy steps.
2016-03-30 16:59:55 +00:00
Karl Palsson
50c056f965 stm32: adc: standardize adc_power_off naming. [BREAKING]
Instead of a mismatch of adc_power_on/adc_off, we now have a matched pair of
adc_power_{on,off}

For some people, this is a breaking change in the API!
2016-03-30 16:59:55 +00:00
tsaitgaist
c759ba59d0 stm32: timer: fix trigger selection names
correct TIMx_SMCR TS[2:0]: Trigger selection name are TI1F_ED, TI1FP1,
TI2FP2 according to RM0008 and RM0090
2016-03-28 22:57:01 +00:00
Anatol Pomozov
ae41782e1a Fix misspellings using codespell tool 2016-03-08 08:52:54 -08:00
Karl Palsson
609cfe7f28 stm32: spi: correct typo in PHILIPS
Fixes: #589 on github
2016-01-04 17:13:30 +00:00
Piotr Esden-Tempski
17f159dec9 [PWR] Removed unneeded vos_scale_t definiton. 2015-12-15 00:51:18 +01:00
Karl Palsson
3a7cbec776 stm32l/stm32f: name space standardization [BREAKING]
As done by esden for the F4, remove typedefs and add prefixes to clock enums
This extends this to all stm32 families.

    Let's not hide the fact that these variables are structs/enums.

    We are filling up the namespace badly enough, we should be prefixing as
    much as we can with the module names at least. As users we already run
    often enough in namespace colisions we don't have to make it worse.

    * CLOCK_3V3_xxx enums renamed to RCC_CLOCK_3V3_xxx
    * clock enums (PLL, HSI, HSE ...) prefixed with RCC_
    * scale enum of pwr module prefixed with PWR_
2015-12-14 23:26:42 +01:00
Nicolas Schodet
9b8d44e8a3 stm32f4: add GPIOJ & GPIOK
They are available on STM32F429 and STM32F439.
2015-11-10 14:27:57 +01:00
Karl Palsson
2e25d678ba Surround all macro parameters with ()
Followup from c72f3d588a637101262d5e2b276dc6cc5d926a6d
2015-10-15 01:03:18 +00:00
Karl Palsson
c72f3d588a Surround all macro parameters with ()
All the macro arguments that are user supplied, or potentially, wrap properly
in () as good practice.

Probably missed one or two, and a lot of them are possibly unnecessary, but
it's straightforward to just do it always.

Fixes github issue #321
2015-10-14 22:15:15 +00:00
Robin Kreis
112cf5d085 stm32l0: commonize PWR definitions and add to l0 2015-10-06 00:53:51 +00:00
Karl Palsson
d67aec1cc8 stm32: Clock Recovery System is a common peripheral.
Pull it out of the F0 directory ready to be used by other devices with this
peripheral.
2015-10-06 00:52:39 +00:00
Karl Palsson
f5eb96caf3 usb: Add st_usbfs_v2 for f0/l0 devices
Based on previous work, add a new driver for the v2 usb peripheral found on
stm32f0 and l0 devices.

Correspondingly, add a usb gadget zero test suite for the f0.  L0 device level
code isn't yet ready, but will add the test case when it moves in.

Work by Frantisek Burian, Kuldeep
Singh Dhaka, Robin Kreis, fenugrec and zyp on irc, and all those forgotten.
2015-10-03 02:03:58 +00:00
Karl Palsson
e121243ce2 usb: extract ST USB FS peripheral core. [BREAKING CHANGE]
The breaking changes here changes in header location, and changes in driver
name passed down to the usb stack.

Changes affect: stm32f102/f103, stm32l1, and some f3 parts

* instead of the confusingly generic "usb" use the name "st_usbfs" for the USB
  Full speed peripheral ST provides in a variety of their stm32 products.
  Include directives should change as:
      #include <libopencm3/stm32/usb.h> => <libopencm3/stm32/st_usbfs.h>

* instead of the confusingly specific "f103" name for the driver, use
  "st_usbfs_v1"  [BREAKING_CHANGE]

  Instead of:
    usbd_init(&stm32f103_usb_driver, .....) ==>
    usbd_init(&st_usbfs_v1_usb_driver, .....) ==>

The purpose of these changes is to reduce some confusion around naming, but
primarily to prepare for the "v2" peripheral available on stm32f0/l0 and some
f3 devices.

Work by Frantisek Burian, Kuldeep Singh Dhaka, Robin Kreis, fenugrec and zyp
on irc, and all those forgotten.
2015-10-03 01:32:34 +00:00
Karl Palsson
40cde559a7 stm32: f24: doxygen updates for flash program width.
More doxygen, more better.
2015-07-31 03:51:32 +00:00
Karl Palsson
ec15c1ca64 stm32: f24: flash: Make code match documentation
This removes the shift from the defines, and includes them in the helper
function, making the code match the documentation, and following how the
rest of the library commonly operates.

Code using the existing defines will continue to work.
2015-07-31 03:51:25 +00:00
Kuldeep Singh Dhaka
c28d7bc187 stm32: spi: Standard mode selection
Allow setting cpol/cpha via standard mode numbers, instead of separate calls
for each bit.
2015-05-25 13:03:20 +00:00
Karl Palsson
5746fd4d25 stm32: common: Extract MCO source setting
This adds MCO source selection to some targets, and removes and standardizes
the mask/shift usage for all targets.  For devices that support MCO2, this
supports only MCO1.  No attempt has been made to extract MCO prescaler, which
is not available on all F1 and F3.
2015-04-29 01:22:27 +00:00
Angus Peart
60739968bd STM32F1: Support for I2C_OAR2 (Dual addressing) 2015-02-05 20:11:06 -08:00
Karl Palsson
8a15cec6bf stm32: f4: flash: support extended sector ranges
F42xx and F43xx have extended sector ranges.

Reported-by: H2OBrain@irc
2014-12-18 23:29:10 +00:00
Karl Palsson
c09d2583dd stm32: f4: Add FLASH_OPTCR1 definition
This is required for stm32f42xx and stm32f43xx with second bank options.
2014-12-17 17:26:25 +00:00
Geoffrey Hausheer
4ff07df7b2 stm32: Add timers 9-17. This should support all F0, F1, and F2 products 2014-10-07 11:23:52 +00:00
Karl Palsson
5d4437fe43 stm32/spi: Replace all SPIx_I2S_BASE with SPIx_BASE
Latest versions of all reference manuals refer to the address as SPIx_BASE, and
simply name some of the individual registers as SPI_I2SXXXX.  Likewise, the
interrupts are simply SPIx, not SPIx/I2Sx.  Rather than hacking more duplicates
into the F0 and L0 parts where this was turning up, remove the pointless _I2S_
from SPI2/SPI3 and make it all consistent

Compile tested only, with the examples collection.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>

Fixes #331
Fixes #347
2014-10-07 11:21:40 +00:00
Karl Palsson
2211944233 stm32: exti: Define all irqs in common header.
There's more exti lines on many more devices now. F0 and F3 have extras, as did
L1 and L0.  There's no real reason not to have higher order EXTI definitions
defined at the top level, and it reduces the number of files to merge together
to find all definitions for the bigger devices.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>

Fixes #338
2014-09-30 22:32:52 +00:00
Ken Sarkies
1f5ce647ff stm32: adc.h regression: Add missing register definitions
The adc unification pull left out some of the shortcut definitions for
ADC1.  See 27bc12de61f8c75425efcf8a61d8ca4a5e4b01b5
2014-03-12 09:27:56 +00:00
Frantisek Burian
bf01d890f6 [STM32F0] Add support for timers.
This commit has been based on kuldeepdhaka's pioneer work, but it was reformatted to apply libopencm3 inclusion tree correctly.

timer_common_all.c now supports new rcc_periph_reset_pulse function for all families.
2014-03-11 16:49:01 +00:00
Ken Sarkies
7816501dbc Changes to the header includes for all STM32 peripherals
to remove variations, redundancies, add missing, fix errors. All c files
refer only to the dispatch style headers in /include/stm32. Those headers
#include memorymap.h and cm3/common.h. All references to
these are removed from the family specific headers. Ethernet untouched as
it appears incomplete.

Added dummy spi.c for F0/F3. Fix some doxygen anomalies.
2014-03-11 16:40:31 +00:00
Frantisek Burian
9c0ca88c2e [F0] Update CRCto be compatible wih RM0091 Rev. 5 2014-02-07 07:46:54 +01:00
Ken Sarkies
0af6d06eda Deduplication of flash code for STM32F0 and F1.
Extension of code for STM32F1 to allow for dual bank series XL.
Small changes to documentation for F2, F4 and L1 to add a parameter reference.

Tested with STM32F103RBT6
(note: tests show that the PG bit must be cleared after programming, otherwise
a subsequent erase attempt fails. This has been added to flash_program_half_word
for F0 and F1 only. A fix for the other families is not included in this PR.)
2014-02-06 00:52:42 +01:00