Code added for L1 to support the PWR Control block didn't properly
follow the HACKING_COMMON_DOC guidelines. The naming was wrong, and
some headers were missing. This commit has no functional changes, it
only addresses the style and structure problems.
Earlier additions to the L1 support were not correctly using linux
coding guidelines as specified in /HACKING.
Some examples were also missing license information.
Updated the documentation so that it appears in all families
Also added it to the L1 area, but is untested. An addition to the memorymap
allows commonality and a #ifdef added to the spi_common_all code to
exclude the case of SPI3 for L1 and F0 as SPI3 doesn't exist in those.
An rcc dispatch header was added to remove same code from the spi header.
This has only been tested functionally with basic timers, and basic operations.
Advanced timer support has been #ifdefed to compile, but this probably needs more testing.
Despite the L1 being a low power device, my initial focus is on making
it basically compatible with existing devices.
To that end, provide clock setup helper routines that configure it for maximum performance,
allowing some similar clock speeds to F1 devices to help with testing. This requires adding
the power chipset routines to set the voltage range.
Clock setup style is similar to the F4 code, which seems nicer than the overflow of different
routines used on the F1 code.
NOTE: Both the F4 existing pwr code, and this code don't actually include the f1 core power
code, even though it should be compatible
