When writing the USB endpoint register, USB_EP_RX_CTR (bit 15) and
USB_EP_TX_CTR (bit 7) should be set to avoid inadvertently clearing
either bit.
Prior to this patch end points could indefinately stall if the hardware
changed these bits between the time they are read and when they were
written.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Added CLR_REG_BIT_MSK_AND_SET and TOG_SET_REG_BIT_MSK_AND_SET because we
need version of CLR_REG_BIT_MSK and TOG_SET_REG_BIT_MSK that allow us to
OR in bits before the register is written.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Rename rcc_ppre1_frequency and rcc_ppre2_frequency to rcc_apb1_frequency and rcc_apb2_frequency
Also add rcc_ahb_frequency (although it is not set correctly in all cases) which will be fixed by
the rcc commits later. Also fixup the only use in the library of these variables, the USART code.
And fix the typos that resulted
Make l1 generic too
Pulls out duplicate calls from f0/rcc.c and uses the common version which
also means that f0 can use rcc_peripheral_enable() now which is in common
but not the old rcc versions.
Tested with a miniblink example on the l053 discovery board.
Only register definitions at this stage, no helpers.
Register definitions from RM0367r2, hopefully the biggest
superset of L0 parts.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
F100 has more remap options than F10x, particularly on the High Density
devices.
Fixes github issue #365
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
The bits definitions for direct manipulation were missing, and should be
present for completeness. However, this only affects the legacy (error prone)
API, replaced some time ago.
old and error prone: (stop using code like this)
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_TIM16EN);
rcc_peripheral_reset(&RCC_APB2RSTR, RCC_APB2RSTR_TIM16RST);
new:
rcc_periph_clock_enable(RCC_TIM16);
rcc_periph_reset_{pulse,hold,release}(RCC_TIM16);
Fixes github issue #361
Latest versions of all reference manuals refer to the address as SPIx_BASE, and
simply name some of the individual registers as SPI_I2SXXXX. Likewise, the
interrupts are simply SPIx, not SPIx/I2Sx. Rather than hacking more duplicates
into the F0 and L0 parts where this was turning up, remove the pointless _I2S_
from SPI2/SPI3 and make it all consistent
Compile tested only, with the examples collection.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Fixes#331Fixes#347
There's more exti lines on many more devices now. F0 and F3 have extras, as did
L1 and L0. There's no real reason not to have higher order EXTI definitions
defined at the top level, and it reduces the number of files to merge together
to find all definitions for the bigger devices.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Fixes#338
This commit has been based on kuldeepdhaka's pioneer work, but it was reformatted to apply libopencm3 inclusion tree correctly.
timer_common_all.c now supports new rcc_periph_reset_pulse function for all families.
to remove variations, redundancies, add missing, fix errors. All c files
refer only to the dispatch style headers in /include/stm32. Those headers
#include memorymap.h and cm3/common.h. All references to
these are removed from the family specific headers. Ethernet untouched as
it appears incomplete.
Added dummy spi.c for F0/F3. Fix some doxygen anomalies.
When compiling with all warnings enabled, some defines can lead to
warning due to missing unsigned type suffix:
warning: integer overflow in expression [-Woverflow]
This fix should not affected behavior at all, since calculation with
such overflows lead to the same actual address when writing to that
location. However, it makes the warning disappear and also defines
the right data type for a memory location.
Extension of code for STM32F1 to allow for dual bank series XL.
Small changes to documentation for F2, F4 and L1 to add a parameter reference.
Tested with STM32F103RBT6
(note: tests show that the PG bit must be cleared after programming, otherwise
a subsequent erase attempt fails. This has been added to flash_program_half_word
for F0 and F1 only. A fix for the other families is not included in this PR.)
This unifies stm32f1, l1, and f4 convenience functions for adc. The code
should be useable for f2 and f37x as well, but that needs hardware for testing,
and there was no existing implementation. This is the reason for the
"adc_common_v1.c" name, as trying to put all the different families into the
common file name has become too cumbersome.
All of the deprecated routines have been dropped, they've been marked
deprecated for a very long time now, and porting them seemed unnecessary.
This has been tested on f1, l1 and f4 discovery boards, and is based on some
existing l1/f1 unification code from
https://github.com/karlp/libopencm3/tree/rme_l1_master
This pulls out all the common header definitions for the F1, L1, F4 and F37x
parts. It's verified against the datasheet for F2 as well, but we don't have
any good F2 test boards or any support for that yet. (The F2 header would be
_exactly_ the same as the F4 header, so it's a target for a future round of
unification, not this one)
Tested with f1, f4 and l1 examples from the examples repository.
