doxygen really wants the @defgroup _and_ the @addtogroup to both have
the full name, matching identically, to avoid all warnings.
Standardize on the "CAPS_PERIPH peripheral API" style.
We didn't actually mark it deprecated very well, but it was
non-functional, and simply a poorly implemented wrapper for
rcc_periph_reset_pulse() anyway.
It's now been obsoleted in the examples for more than a year, and it's
time to kill it outright.
Fixes: https://github.com/libopencm3/libopencm3/issues/709
The ADVANCED_TIMERS define/check was added in 523943a as part of adding L1
support. The runtime checks against TIM1/TIM8 already existed. Since L1
doesn't have TIM1/TIM8, those names are undefined, resulting in a compilation
error until ifdeffed out.
Since I throw out all TIM1/TIM8 checks, there's no references to those names
left, thus no need to keep the ifdef either.
As for the registers themselves, l1/timer.h pulls in common/timer_common_all.h
which defines macros for the superset of all timers, so e.g. TIM_BDTR() is
still available regardless of whether or not the particular chip we're building
for has any timers with a BDTR register.
All defined bits are rc_w0.
The paranoid version of this would write 0 to the reserved bits (0 is the
"reset value"), but this would require knowing which flags are valid on the
actual platform, and adding the corresponding macros.
This commit has been based on kuldeepdhaka's pioneer work, but it was reformatted to apply libopencm3 inclusion tree correctly.
timer_common_all.c now supports new rcc_periph_reset_pulse function for all families.
Added --terse and --mailback options to the make stylecheck target. It
also does continue even if it enounters a possible error.
We decided on two exceptions from the linux kernel coding standard:
- Empty wait while loops may end with ; on the same line.
- All blocks after while, if, for have to be in brackets even if they
only contain one statement. Otherwise it is easy to introduce an
error.
Checkpatch needs to be adapted to reflect those changes.
f1/timer.
Added timer_ic_set_polarity to timer_common_f24 with
the enum tim_ic_pol now including trigger on both edges.
Changed timer_slave_set_polarity to use enum tim_et_pol
rather than tim_ic_pol.
In response to suggestion of stinkydiver73 on 24 March that
timers in all families have an option for triggers on both
edges, except F1.
F2 and F4 have a common section to deal with the options register (TIM2 and TIM5 only)
L1 has been made common with timer_common_all as its options register has very different settings to F2/F4. Code is in the L1/timer.c L1/timer.h files
Note that F3 and F05 timers should fit into this scheme, with F3 having additional features.
Bundled with this is L1/pwr.h to change a documentation setting
Also all the Doxyfiles have added "ENABLE_PREPROCESSING = NO" to fix a problem introduced by commit 118.
