147 Commits

Author SHA1 Message Date
Karl Palsson
b47b967440 doc: use common naming for peripheral apis
Only applied to STM32 doc trees at present.

Instead of declaring a group for "STM32blah" in the doc-blah.h files,
and then trying to put all the common+specific peripheral code into
those groups, (which is what led to the stub doxygen holder empty .c
files)  Just use a standard name like "Peripheral APIS" and place
everything into that.

Demonstrated by converting ADC and USART peripherals, which is
definitely not complete, but it shows how to make things less magical,
and less prone to copy/paste errors.  Now, you can copy/paste and it
will do the right thing, because everyone uses the same group names.

This is also how to unify the mix of "STM32blah->Periphblah" and _also_
the dangling "periph_file" modules in doxygen, it merges them together
properly, as they're intended to be really.
2018-07-03 22:23:00 +00:00
Guillaume Revaillot
bf125e91f9 stm32: rework spi, based on PR #740 and #742.
split spi stuff in three part:
 - v1 : basic spi peripheral
 - v1_frf : v1 spi with frf mode additional bit in spi_cr2 / spi_sr
 - v2 : spi with variable datasize, fifo and other fancy stuff.

v1 maps to f1 chips
v1_frf to f2, f4 and l0,l1
v2 to f0, f3 and l4

This breaks spi_master_init API for v2 devices : function prototype from
common spi header used to be abused, with DFF bit reused for CRCL bit.
New v2 spi_master_init does not handle anymore CRCL bits, as it does not
usually mess with other crc configuration.
2018-04-28 21:12:27 +00:00
Karl Palsson
0965e691a9 stm32f2/f4: rcc: deprecate old IO definitions
instead of hard breaking, provide them as macros pointing to the new
values, and document them as deprecated.
2018-02-13 23:57:41 +00:00
Yonghua Zheng
eeef996cb0 [BREAKING] rcc: change gpio bit defines to be consistent with reference manual
This _breaks_ your gpio code for F2 and F4.  It makes them consistent
with the reference manual, and more consistent with all other families
and general expectations.

OLD code -> NEW code
RCC_AHB1RSTR_IOPxRST 	->	RCC_AHB1RSTR_GPIOxRST
RCC_AHB1ENR_IOPIxEN	->	RCC_AHB1ENR_GPIOxEN
RCC_AHB1LPENR_IOPxLPEN	->	RCC_AHB1LPENR_GPIOxLPEN

[We're not actually breaking it, see the next commit for deprecated
aliases]
2018-02-13 23:57:21 +00:00
Damien Nicolet
19d296dd7b stm32f4: qspi: Typo correction in QUADSPI_ABR 2017-11-16 23:57:11 +00:00
Karl Palsson
0663341244 stm32f4: dcmi: doc: group register bit defns
Makes the doxygen much much prettier and easier to follow.
2017-10-23 21:31:19 +00:00
Marek Koza
3dbcd16ced stm32: f4: Add DCMI peripheral register definitions 2017-10-23 21:31:16 +00:00
Karl Palsson
db7a8d71ca stm32f4: rcc: doxygen updates
Uses doxygen groups instead of just  ------ comments, so they now
automatically get documented online.
2017-09-09 20:35:48 +00:00
Karl Palsson
db5f550611 stm32f4: Add new clock gate enable register for f413
Yet more clock enable bits on new F413/F423.
Sourced from RM490rev5
2017-09-09 19:59:04 +00:00
vollst-induktion
a42a058966 stm32f1/f4: adc: Fix ADC_SMPRx_SMPy_MSK defines
Referred to obsolete definition names.
2017-08-24 21:34:28 +00:00
Karl Palsson
29c712326f stm32: rcc: extract osc_bypass functions
rcc_osc_bypass_enable and rcc_osc_bypass_disable have been copy/pasted
around for the last time!  There's a compile bit to check for L0/L1, but
otherwise this is just code duplication for no gain.
2017-06-08 23:01:45 +00:00
Matthew Lai
383fafc862 stm32: renamed pwr_common_all to pwr_common_v1, and pwr_common_l01 to pwr_common_v2 2017-03-30 21:48:08 +00:00
Karl Palsson
d1d511c6f4 stm32: rcc: add reset reason group flags.
Originally suggested in https://github.com/libopencm3/libopencm3/pull/399

At least provide macros for each family that allows easy masking of the
full set of reset reason flags.  Trying to provide a function that
provides these in random upper bits seems unclear at best.
2017-03-30 21:48:08 +00:00
Sergey Matyukevich
ef91856ac1 stm32: unify i2c implementations
The f1, f2, f4, l1 chip families have a similar "v1" i2c peripheral on board.
More recent f0, f3, l0, l3 chip families share another "v2" version  of i2c.

This patch unifies headers and implementation for two types of i2c peripherals:

- rename: i2c_common_all.[ch] to i2c_common_v1.[ch]
- remove i2c_common_f24.h: extra I2C blocks are defined in specific headers
- use f3 i2c code as a basis for common "v2" i2c implementation
- add f0 i2c support: use "v2" i2c implementation

Tests:
- tested on a custom f0 board
- compile-tested both libopencm3 and libopencm3-examples for all stm32

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
2017-03-30 21:48:07 +00:00
Karl Palsson
2476099f29 stm32:rng: f4 rng peripheral is common with at least f2
Pull it up as common code immediately. Rename to v1, extract to common
with a doxygen marker stubs, add to F2 makefiles.
2017-03-30 21:48:07 +00:00
Karl Palsson
c9c5cb7c9c style: fix some of the easier style bugs
No real changes.
2017-03-30 21:48:07 +00:00
Karl Palsson
6c034c8981 stm32f4: rcc: fix compilation error missed in testing
Fixes: 57c2b00a69f97205313e1c7ab8116ee1893b231e

Running make for final sanity failed to catch this due to jobserver
issues.  *fumes*
2016-08-23 22:13:33 +00:00
Chuck McManis
57c2b00a69 stm32f4: rcc: support new plls for new f4 parts
Revise the PLL inits to support new and old PLL configurations,
particularly to support F4x9 devices.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2016-08-23 22:02:12 +00:00
Karl Palsson
4eb51ecaea stm32: rcc: rcc_wait_for_osc_ready is always available
Move the prototype to the common_all header and include documentation.
2016-08-18 23:41:04 +00:00
Karl Palsson
c94a58e844 stm32f4: dsi: trivial style cleanup 2016-08-16 21:22:53 +00:00
Chuck McManis
b897397ba9 stm32f4: dma2d: Add include files for DMA2D
Adds include files and updates memorymap.h file to
include base address of DMA2D
2016-08-16 20:58:18 +00:00
Chuck McManis
32a91e52ff stm32f4: Add QUADSPI Includes
Adds an include file (and required RCC and memorymap changes)
to address registers in the QUADSPI peripheral on the F4 line
of processors.
2016-08-15 22:44:36 +00:00
Chuck McManis
32f2b5042f stm32f4: dsi: DSI Peripheral include file
Adds the dsi.h file to the f4 path of the library.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2016-08-15 22:18:24 +00:00
Chuck McManis
b802bd07b2 stm32f4: rcc: support PLL_SAI and PLL_I2S
Adds the missing enums for the extra clocks on stm32f4x9 parts.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2016-08-15 20:58:33 +00:00
Chuck McManis
2614577e5a stm32f4: rcc: Add missing defines for f4x9 series
Adds missing bit definitions only.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2016-08-15 20:58:29 +00:00
Karl Palsson
cf7d0a08ca stm32: rcc_wait_for_sysclk_status should actually wait
Original implementation only checked whether the user had _selected_ the
clock, not whether it had actually switched to the clock or not.  For
almost all cases, this made this function either a no-op, if you _had_
selected the clock, or a blocking loop if you hadn't selected it ahead
of time.

Fixes github issue #687
2016-08-15 16:09:58 +00:00
Karl Palsson
b2e6e5c3b9 stm32: standardize names for temp sensor calibrations
Instead of some parts using _30C and _110C and others using _30C and _110, use
the C suffix in all places to be consistent.
2016-03-30 16:59:55 +00:00
Karl Palsson
a22d6a8315 stm32: adc: standardize special channel names
At least temp sensor, vrefint and vbat/vlcd should have consistent names and
consistent doxygen.
Dropped channel definitions that are the same as the raw number.
2016-03-30 16:59:55 +00:00
Anatol Pomozov
ae41782e1a Fix misspellings using codespell tool 2016-03-08 08:52:54 -08:00
Karl Palsson
5738e9515d stm32: rcc: fix missing ahb_frequency struct
Original commits, while appearing clean and tidy, hadn't even been
compile tested.  Trust no-one. Not even Scully.

Fixes: 770878e7b4ac12513e121e087261ca0972ba04e6
Fixes: 86d20ef00c00a14d7a4f0b834b9b608b2dd3638a
Fixes: 05ff0df32226dc28e22b98afde07bb886af9ddc9
2016-02-17 16:21:30 +00:00
Piotr Esden-Tempski
d680be81b5 [stm32f4] Remove rcc typedefs added prefixes to clock related enums.
Let's not hide the fact that these variables are structs/enums.

We are filling up the namespace badly enough, we should be prefixing as
much as we can with the module names at least. As users we already run
often enough in namespace colisions we don't have to make it worse.

* CLOCK_3V3_xxx enums renamed to RCC_CLOCK_3V3_xxx
* clock enums (PLL, HSI, HSE ...) prefixed with RCC_
* scale enum of pwr module prefixed with PWR_
2015-12-14 23:26:32 +01:00
Piotr Esden-Tempski
b1049f9a6f [Style] Stylefix sweep over the whole codebase. 2015-12-14 22:57:15 +01:00
Nicolas Schodet
9b8d44e8a3 stm32f4: add GPIOJ & GPIOK
They are available on STM32F429 and STM32F439.
2015-11-10 14:27:57 +01:00
Karl Palsson
c72f3d588a Surround all macro parameters with ()
All the macro arguments that are user supplied, or potentially, wrap properly
in () as good practice.

Probably missed one or two, and a lot of them are possibly unnecessary, but
it's straightforward to just do it always.

Fixes github issue #321
2015-10-14 22:15:15 +00:00
Karl Palsson
17bc66c46b stm32f4: fmc: Use standard form shift definitions.
It's confusing and unhelpful to use a different style of shift definitions for
bitfields.

Originally reported by "mox-mox" in
https://github.com/libopencm3/libopencm3/pull/467
2015-10-06 01:26:56 +00:00
Jorik Jonker
07ee71cf23 stm32f4: rcc: Add 84Mhz, max speed for f401
Basic helpers to at least support common configurations for the f401.

Original submission specified 5 wait states, but the reference manual and other
reviewers all believe that 2ws is sufficient for these modes.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2015-07-31 02:25:23 +00:00
Karl Palsson
a4bb8f7e24 stm32f4: fix i2s_ext register addresses
Registers were swapped.

Fixes #465
2015-06-22 01:11:50 +00:00
Karl Palsson
5746fd4d25 stm32: common: Extract MCO source setting
This adds MCO source selection to some targets, and removes and standardizes
the mask/shift usage for all targets.  For devices that support MCO2, this
supports only MCO1.  No attempt has been made to extract MCO prescaler, which
is not available on all F1 and F3.
2015-04-29 01:22:27 +00:00
kbob
fd141a8131 Definitions for LTDC (LCD-TFT video). 2015-02-20 19:40:23 -08:00
Piotr Esden-Tempski
5658a4ebcf [stm32f4-ltdc] Style cleanup.
Mainly replaced function like defines with static inline functions.
2015-02-12 19:02:51 -08:00
Piotr Esden-Tempski
34e9e8c3e1 [stm32f4-ltdc] Remove the LCD_TFT_BASE define.
This define name was used because of datasheet inconsistency. The
correct name is LTDC.
2015-02-12 19:02:51 -08:00
Oliver Meier
7fbd49b3fc [stm32f4-ltdc] Helper function to wait for SRCR reload to complete 2015-02-05 16:44:38 -08:00
Oliver Meier
4b8f5e613b [stmf4-ltdc] added 3 spaces 2015-02-05 16:44:38 -08:00
Oliver Meier
3c9b07d776 [ltdc-stm32f4] add helper function to convert rgb565 to rgb888 2015-02-05 16:44:38 -08:00
Oliver Meier
c26831fab0 [stm32f4-stdc] fixed includes 2015-02-05 16:44:38 -08:00
Oliver Meier
eaae7731e9 [stm32f4-ltdc] initial commit 2015-02-05 16:44:38 -08:00
Chuck McManis
14ad92015e Audit RTCPRE Shift and Mask Values
L0 - RTC Prescaler appears in RCC_CR, bit 20, 2 bits wide (RM0367 Rev 2)
L1 - RTC Prescaler appears in RCC_CR, bit 29, 2 bits wide (RM0038 Rev 10)
F0 - no prescaler setting (RM0091 Rev 7)
F1 - no prescaler setting (RM0041 Rev 4)
F2 - RTC Prescaler appears at RCC_CFGR, bit 16, 4 bits wide (RM0033 Rev 6)
F3 - no prescaler setting (RM0316 Rev 3)
F4 - RTC Prescaler appears at RCC_CFGR, bit 16, 4 bits wide (RM0090 Rev 8)
2014-12-14 16:29:03 -08:00
Chuck McManis
9ddfcb0e53 Rename rcc_ppre1_frequency and rcc_ppre2_frequency
Rename rcc_ppre1_frequency and rcc_ppre2_frequency to rcc_apb1_frequency and rcc_apb2_frequency
Also add rcc_ahb_frequency (although it is not set correctly in all cases) which will be fixed by
the rcc commits later. Also fixup the only use in the library of these variables, the USART code.

And fix the typos that resulted
Make l1 generic too
2014-12-13 19:49:04 -08:00
Freek van Tienen
ac8ac8c64d [f4] Added a 25mhz clock 2014-10-15 17:27:18 +02:00
Karl Palsson
5d4437fe43 stm32/spi: Replace all SPIx_I2S_BASE with SPIx_BASE
Latest versions of all reference manuals refer to the address as SPIx_BASE, and
simply name some of the individual registers as SPI_I2SXXXX.  Likewise, the
interrupts are simply SPIx, not SPIx/I2Sx.  Rather than hacking more duplicates
into the F0 and L0 parts where this was turning up, remove the pointless _I2S_
from SPI2/SPI3 and make it all consistent

Compile tested only, with the examples collection.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>

Fixes #331
Fixes #347
2014-10-07 11:21:40 +00:00