693 Commits

Author SHA1 Message Date
Alfred Klomp
1adc418f9a stm32f42/f43: rcc: add 180 MHz clock options 2018-11-12 21:41:05 +00:00
Alfred Klomp
f0e5c73d98 stm32: pll: disable before configuring 2018-11-12 16:49:56 +01:00
Karl Palsson
2619a4506c stm32f7: use spi v2 peripheral.
F7 indeed has v2 peripheral, not the v1.  Distinguishing figure is the
8/16bit fifo.
2018-10-23 21:21:42 +00:00
mfm
f6517f7816 stm32: adc common v2: add circular dma mode
Tested only on the F3 so far.
2018-10-20 11:46:47 +00:00
Karl Palsson
bc7e454741 stm32f7: include common dma code
Originally reported at https://github.com/libopencm3/libopencm3/pull/978
2018-10-20 11:40:38 +00:00
Filip Moc
4b16af6e24 stm32: iwdg: correct calculation for all ranges.
The original calculations miscalculated ranges such as
512..639 or 1024..1151 or ... or 32768..32895

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2018-10-05 23:31:52 +00:00
Jacob Rodgers
e2b67d7264 Set PLL source in rcc_clock_setup_pll() for STM32L0 2018-09-29 07:55:16 -07:00
Karl Palsson
cccc1267c5 stm32f7: drop toolchain check for m7 support.
the 2014q3 or later toolchains are now readily available, and we should
now just consider this a user problem.  This gets us out of trying to
parse compiler help output and chasing our own tail.

Fixes https://github.com/libopencm3/libopencm3/issues/965
2018-09-10 21:44:16 +00:00
Karl Palsson
9ddafa6284 stm32f7: enable common timers support 2018-09-09 16:38:56 +00:00
Karl Palsson
de538c4b80 stm32f7: desig: link common implementation 2018-08-29 09:56:43 +00:00
Clara Casas
889b7de0d7 stm32: adc: Add functions to get and clear flags
This includes adding documentation to the status flags.

Originally tracked at: https://github.com/libopencm3/libopencm3/pull/833

Modified to drop whitespace changes, and simply boolean return.
2018-08-28 22:00:07 +00:00
Daniel Gröber
743513a4b1 stm32: add dma_get_number_of_data
Original discussion at: https://github.com/libopencm3/libopencm3/pull/702
2018-08-28 22:00:01 +00:00
Karl Palsson
08c76f25ec stm32: spi: drop empty spi.c files.
They were originally used to make sure that the doxygen was generated
correctly, but that style is no longer necessary.

There may be more peripherals that can be "cleaned" like this, but let's
do them one step at a time, as we work on that area.
2018-08-27 22:57:41 +00:00
Florian R. Hölzlwimmer
f3c620b51b stm32f7: spi: include common code 2018-08-27 22:57:28 +00:00
Karl Palsson
26ab78a710 usb: fix race between setup complete and endpoint nak
See https://github.com/libopencm3/libopencm3/issues/873

Commentary describing this patch originally by zyp:

```
After looking further into it, I've concluded that my preliminary
analysis looks correct. The problem is that setting CNAK before
the SETUP complete event is received causes a race condition. The
SETUP callback is called when the SETUP packet event is received,
which means that setting CNAK from the callback is too early.

Originally the problem was that CNAK was set by ep_read() which is
called by the callback. #672 solved this by moving CNAK out of
ep_read() and calling it after the SETUP complete event is received
instead.

The regression by #785 is caused by the introduction of flow control
calls into the SETUP callback. They also set CNAK.

To solve this properly, I propose changing the event handling code
to only call the SETUP callback after the SETUP complete event is
received. Unfortunately, this implies that the callback can't call
ep_read() itself anymore, because the packet has to be read out of
the FIFO before the SETUP complete event arrives. This implies a
change of the API between the hardware drivers and _usbd_control_setup().
```

L1 (st_usbfs) works and passes tests as before change
F4 (dwc_otg_fs) works and now passes tests. (yay)
LM4f still compiles, and has had the same style of implementation as
st_usbfs, however has not been tested on any hardware.
2018-08-27 15:11:32 +00:00
Jordi Pakey-Rodriguez
21b23f1ff1 stm32f4: adc: Add VBat sensor enable/disable
Original discussion at: https://github.com/libopencm3/libopencm3/pull/770
2018-08-19 23:26:04 +00:00
Karl Palsson
e5b8a164a6 usb: st_usbfs_v2: support disconnect functionality
Originally suggested via https://github.com/libopencm3/libopencm3/pull/628
2018-08-19 23:26:04 +00:00
fenugrec
01f33f47b7 USB: st_usbfs : fix USB_COUNTn_RX buffer size calculation:
Fixes https://github.com/libopencm3/libopencm3/issues/476

Sets USB_COUNTn_RX reg fields : bits <14:10> are NUM_BLOCK; bit 15 is BL_SIZE.
 - When (size <= 62), BL_SIZE must be 0 and NUM_BLOCK set to (size / 2).
 - When (size > 62), BL_SIZE must be 1 and NUM_BLOCK=((size / 32) - 1).

Previous code improperly set NUM_BLOCK and assumed the requested size was set.
Now, we use the next largest legal buffer size. Examples:
size BL_SIZE NUM_BLOCK => Actual bufsize
0    0       0         ??? (illegal !)
1    0       1         2
63   1       1         64
Algo is valid for F102, F103 and F0 devices (USB_FS peripheral).
In addition, the new usb_set_ep_rx_bufsize() function returns the actual
size set.

Tested-by: Karl Palsson <karlp@tweak.net.au>
2018-08-17 00:16:18 +00:00
Karl Palsson
b8ede60d9d stm32f3: flash: support basic write/erase operations
Originally filed as https://github.com/libopencm3/libopencm3/pull/627
2018-08-17 00:15:01 +00:00
Karl Palsson
3293913be2 stm32f3: flash: add clear write protect flag
Could actually move to flash_common_f, but they have different names for
the same bit at present.
2018-08-17 00:15:01 +00:00
Christian Tacke
c55ec70f49 STM32: USART: Fix baudrate calculation for LPUART1
LPUART1 needs BRR to be 256 times the normal value.

Doing this with 64 bit math would work, but that pulls in quite a lot of
code for every platform, even if they don't have LPUART.

A little bit of maths, thanks to zyp on irc, lets us keep it in 32bit,
provided people don't try and use > 16MBaud on LPUARTs

Originally tracked via https://github.com/libopencm3/libopencm3/pull/888
2018-08-17 00:15:01 +00:00
Karl Palsson
05ce5de4c2 stm32f2/4: link in the specific flash.o files.
We extracted code out to the common files, but they weren't being
linked.  This didn't matter in the past, as they were empty.

Fixes: 46d4103c stm32: flash: move wait_for_last to f2/f4 explicitly.

Fixes: https://github.com/libopencm3/libopencm3/issues/953
2018-08-14 11:19:58 +00:00
Karl Palsson
ddc7ab8c6c stm32l4: flash: don't use misleading names
flash_clear_pgperr_flag is a name used on f247, which is actually most
analogous to the SIZERR bit on l4, (it's a parallelism error)

the bit being cleared originally in this function, PROGERR is a new bit,
and should have it's own name.

Add a function to handle the previously unhandled size/parallelism flag,
and rename the existing one to properly reflect it's new name.
2018-07-29 20:31:17 +00:00
Karl Palsson
231f21296f stm32: f247: flash: use common code.
This shows what is _actually_ different for f7.  A couple of option
bits, and a renaming of bit 7 of the status register, from Program
Sequence Error to Erase Sequence Error.

We keep the separate implementation of wait_for_last_operation, to meet
the "suggestions" of the reference manual to insert a DSB instruction.

Keeping the renamed bit/functions also requires us to keep separate
implementations of the flag clearing functions
2018-07-29 20:31:17 +00:00
Karl Palsson
46d4103c1d stm32: flash: move wait_for_last to f2/f4 explicitly.
We're preparing to use all the common code for f2, f4, f7 and large
chunks of l4.  Extract things that we know need to be done differently
there.
2018-07-29 20:31:17 +00:00
Karl Palsson
eafc46ff24 stm32: flash: extract wait_for_last_operation to top level
This then eliminates the misguided attempts at merging f2/4 and f3 flash
support.  Some headers remain.
2018-07-29 20:31:17 +00:00
Karl Palsson
a949b223c3 stm32f3: flash: pgerr is not the same as pgperr
F3's flash interface is actually quite different, don't try and force
sharing code that isn't really related.  The "PGERR" is a very different
bit than the parallelism error that f2/4/7 have.
2018-07-29 20:31:17 +00:00
Karl Palsson
b9448bff16 stm32l4: flash: fix page erase for second bank
l4 is pages, not sectors, so update apis to be consistent. (other
families use page/sector as defined in the reference manual)
Make sure that pages on the second bank can also be erased.  Use the
same style in use for f2/4/7 for sector numbers across banks.
2018-07-29 20:31:17 +00:00
Karl Palsson
850931dbcd stm32: flash_unlock_option_bytes is common code.
The keys differ between some familes, but the documentation and
implementation are standard.
2018-07-29 20:31:17 +00:00
Karl Palsson
c5a3350a7d stm32l: flash: rename option unlock keys or consistency
Paves the way for using common code.
2018-07-29 20:31:17 +00:00
Karl Palsson
4517ec81fd stm32: flash: remove superfluous locking of option bytes
Comments were not consistent, and this serves no purpose.  There's no
reason to explicitly lock the flash first before unlocking.  These bits
are simply set when the keys are written.
2018-07-29 20:31:17 +00:00
Karl Palsson
7a27795d8c stm32: flash: pull out i/d cache support.
Copied a few times.
2018-07-29 20:31:17 +00:00
Karl Palsson
2bf7eb4a0c stm32: flash: pull set_ws up to common code
All that changes is the size of the field.
2018-07-29 20:31:17 +00:00
Karl Palsson
4840b6bc7e stm32: flash: pull up clear_eop
All the "f" type flash parts have an EOP flag, even if it's in different
bit positions.  Add a header for this common functionality, and move
it's implementation to the existing common file.
2018-07-29 20:31:17 +00:00
Karl Palsson
da7ebafcbe stm32: flash: pull lock/unlock up to common_f.
This is a common operation, so definition in _all, and every part except
l0/l1 have the same implementation.  Bring in an _f file too.
2018-07-29 20:31:17 +00:00
Karl Palsson
b23dccc7ae stm32: flash: pull up prefetch to _all
Turns out, there's lots of common code for flash.  Pull up prefetch
on/off to start with, as there's only a single bit name different.

Pull up the definitions of common API functions too, starting with
flash_set_ws.  Even if the implementations are different, things that
meant to be the same, should be defined centrally.
2018-07-29 20:31:17 +00:00
Karl Palsson
9dd901ba27 stm32: flash: BSY bit has never been writable.
This has been copied around for years, but has never been a writable bit
on any target.
2018-07-29 20:31:17 +00:00
Karl Palsson
30d88452e6 stm32f4: flash: support discontinuous sectors on banked flash
The sector list is numerically contiguous, but the bits to write are not
contiguous.  Good job ST.

Fixes: https://github.com/libopencm3/libopencm3/pull/934

Don't see any reason to make public definitions of these sorts of magic
numbers, they're completely internal to sector addressing.
2018-07-29 20:31:17 +00:00
Jordi Pakey-Rodriguez
cc8c8a2f83 stm32f4: power: update rcc_clock_scale enum
- Change .power_save to .voltage_scale, a pwr_vos_scale enum
- Enable pwr clock before setting VOS scale
- Fix flash wait states
- Make flash_set_ws more robust
2018-07-29 20:31:17 +00:00
Matt Anderson
0d5e51a8a7 STM32F0: Add RCC API for I2C1 clock source
* Providing API to set/clear RCC_CFGR3_I2C1SW on STM32F0, duplicated
	from STM32F3 applies only to I2C1.
2018-07-03 22:30:24 +00:00
Matthew Lai
68fce5a0ab stm32f7: rcc: fixed wrong constants, added more settings, clock setup refactoring 2018-07-03 22:23:00 +00:00
Matthew Lai
ba0e0424b5 stm32f7: flash: added proper support 2018-07-03 22:23:00 +00:00
Karl Palsson
ab9e425272 stm32f3: rcc: add hse preconfigurations
Just a single 8Mhz in, 72mhz (max) out, which suits the f3 discovery
boards for instance.
2018-07-03 22:23:00 +00:00
Karl Palsson
ee8b5bf4ac stm32f3: rcc: drop useless 44MHz clock structure.
This clock speed is not USB compatible, it's not the maximum for
anything, nor the minimum, it's just a distraction.  Drop it.
2018-07-03 22:23:00 +00:00
Karl Palsson
034dbf20ff stm32: timers: drop deprecated timer_reset()
We didn't actually mark it deprecated very well, but it was
non-functional, and simply a poorly implemented wrapper for
rcc_periph_reset_pulse() anyway.

It's now been obsoleted in the examples for more than a year, and it's
time to kill it outright.

Fixes: https://github.com/libopencm3/libopencm3/issues/709
2018-07-03 22:23:00 +00:00
Martin Sivak
572a50a53c stm32l0: include rtc module 2018-07-03 22:23:00 +00:00
Guillaume Revaillot
8310de2f5b doc: convert stm32 iwdg peripheral to common naming 2018-07-03 22:23:00 +00:00
Karl Palsson
b4154f3ce6 doc: convert i2c to peripherals_api 2018-07-03 22:23:00 +00:00
Karl Palsson
40024fa211 doc: convert SPI to peripheral_api style
Response to cmcmanis having trouble finding it online
2018-07-03 22:23:00 +00:00
Karl Palsson
b9cf3a7072 doc: convert CRC periphal to common naming
Previously scattered about under "crc_file" and under "STM32blah->CRC"

Deletes empty doxygen marker files, and uses groups instead.
2018-07-03 22:23:00 +00:00