In this commit, support for the different base addresses for different
F7 parts is added, but the mechanism is now in place for L1 and others.
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
(whitespace fixed, commit msg reworded)
We don't need groupings around each enum, they format nicely into a
section already. Likewise, the doxygen _is_ documentation, so we don't
need extra versions of it in places. Also fix a few warnings generated.
According to L4/L0/G0 RM, in case of clock error, interrupt flag must
be cleared, and CECS flag should be cleared as soon as clock meets
requirement.
Reviewed-on: https://github.com/libopencm3/libopencm3/pull/1062
If noise source error occurs, flag must be cleared and data register
must be discarded (at least 12 reads to flush pipeline on G0). Other
device mention start/restart of chip, so, do both (better safe than
sorry).
Reviewed-on: https://github.com/libopencm3/libopencm3/pull/1062
- match the same logic as the f0 api
- use ADC_CFGR1_AWD1CH_VAL macro to mask the channel bits
- don't check if channel is < 18q
- enable the awd in addition to setting the selection to single channel monitoring (in following with the signature and @brief 'enable'
rtc_common_all never existed, and f3 has the same "v2" peripheral used
by ~all parts other than the f1. We don't have any f3 rtc test code,
but the existing code was clearly wrong, and this is at least including
the correct basic defines.
Fixes: https://github.com/libopencm3/libopencm3/issues/1106
A normal git clone doesn't catch these, as it _knows_ that the files are
in the git repo and should be tracked. However, downloading a tarball,
and adding it to a new git repo shows up the problem as important files
are simply not added, and would be dropped by git clean.
Reported-by: https://github.com/libopencm3/libopencm3/issues/1153
Unlike with the doxygen source generation, we can't autoguess which of
the class files are eligible automatically. Instead, make a stub hid
file, (which we can now start adding to, if desired) and include it in
all builds that include other class stubs.
* Conforms mostly to the STM32 GPIO API where possible.
* Supports pin configuration (direction, pull-up/down, etc.) as well
as pinmux configuration.
* Supports set/clear/get operations to the GPIO port/pins.
* Created base doxy header and groups to align with existing formatting.
The original rcc_peripheral_enable_clock aren't explicitly deprecated,
as they do let you enable multiple periphs in one call. But they're
error prone, from user feedback, so update the docs to ensure people
know what the other options are.
Original code used the special macros for rcc_periph_clock_enable
instead of the appropraite APB1ENR bit definition.
Switch to the correct, simpler form, using the correct parameter.
