718 Commits

Author SHA1 Message Date
Karl Palsson
af3389652c stm32: timers: Fix edge polarity setup
The CCxP/CCxNP bits are actually separated by a reserved bit, so the
correct mask is 0xa, (0b1010) not 0x6 (0b0110)

Reported by PyroDevil on the mailinglist
2014-07-15 13:28:02 +00:00
Karl Palsson
cf5fb002f6 [l1-flash/eeprom] Add lock/unlock/eeprom helper routines 2014-07-14 17:54:20 +00:00
Franck Jullien
d6bad27735 Allow more than one usbd_register_set_config_callback
In a composite device if one want to separate code
for each interface, usbd_register_set_config_callback
can now register more than one callback.

Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
2014-07-14 14:04:58 +02:00
Pavol Rusnak
806ebb18fa add MSC (Mass Storage Class) support 2014-07-03 18:46:55 +02:00
Felix Ruess
f6b6d62ec5 [stm32] fix dox for rcc_periph_x
closes #329
2014-06-28 02:40:36 +02:00
Felix Ruess
f49c1f264a [stm32] fix i2c_reset
rcc_periph_reset_pulse needs RST_I2Cx instead of RCC_I2Cx as argument
see also #329
2014-06-26 00:05:46 +02:00
Felix Ruess
c01f9ee323 [stm32] implement i2c_reset using rcc_periph_reset_pulse
this also adds support for I2C3 in i2c_reset
2014-06-11 12:58:05 +00:00
Karl Palsson
b37597f1db stm32/dac: Follow ref-man guidelines on GPIO config
GPIO pins should be configured for Analog IN on virtually all families
to reduce parasitic consumption.

Reported-by: Roger Wolff <R.E.Wolff@BitWizard.nl>
2014-05-19 10:29:11 +00:00
Roger Wolff
a99e3a2cd3 stm32/flash: Make comments match reality
Copy/paste commentary with wrong sizes.
2014-05-19 10:21:56 +00:00
Karl Palsson
34ed0a740b sync: use matching #ifdefs in source as in header
Fixes github issue #298
2014-04-04 20:19:37 +00:00
Karl Palsson
5b6e97732b cm0 doesn't support sync operations
So remove the warning, the sync code is already left out of the cm0
builds.

Fixes #291
2014-03-12 09:40:03 +00:00
Nikolay Merinov
ec29bd7f48 stm32l1: lcd: Basic LCD configure functions. 2014-03-11 21:44:48 +00:00
Nikolay Merinov
553a14f21d stm32l1: lcd: Define all LCD registers
Define minimal susbet of necessary functions for work with LCD screen.
2014-03-11 21:44:48 +00:00
Frantisek Burian
14f1ac4764 stm32: common: SPI: Fix spi_common_all warning
Fixes #226

This function should be deprecated in the future.
2014-03-11 21:13:03 +00:00
Frantisek Burian
bf01d890f6 [STM32F0] Add support for timers.
This commit has been based on kuldeepdhaka's pioneer work, but it was reformatted to apply libopencm3 inclusion tree correctly.

timer_common_all.c now supports new rcc_periph_reset_pulse function for all families.
2014-03-11 16:49:01 +00:00
Rick Kimball
f780075d4d add dac support to stm32 f0 2014-03-11 16:40:31 +00:00
Ken Sarkies
7816501dbc Changes to the header includes for all STM32 peripherals
to remove variations, redundancies, add missing, fix errors. All c files
refer only to the dispatch style headers in /include/stm32. Those headers
#include memorymap.h and cm3/common.h. All references to
these are removed from the family specific headers. Ethernet untouched as
it appears incomplete.

Added dummy spi.c for F0/F3. Fix some doxygen anomalies.
2014-03-11 16:40:31 +00:00
Felix Held
0f29fc8b1b [sam3a] apply SRCLIBDIR patch 2014-03-01 18:16:33 +01:00
Frantisek Burian
0d08891c8d [stm32f1] Fix bad RCC_ definitions for issue #77 2014-02-24 18:44:12 +00:00
Felix Held
641fbffe9a [sam3a] add irq table and memory map 2014-02-24 02:32:38 +01:00
R.E. Wolff
fbf8c19ea4 stm32: dac: buffer enable bits were inverted. 2014-02-17 15:19:22 +00:00
Frantisek Burian
6de1b50c4e [BUILD] Fix the correct make behavior if compiling inside tree
On linux, the output of CP rule was try to write to / which is - of course, forbidden for write.

This solution adds to each part of lib correct pointer to the root of lib where the libs should be written.

Bug found by Kuldeep Singh Dhaka.
2014-02-12 15:27:03 +00:00
Frantisek Burian
fc9a7260c2 [F0] Add new peripheral Clock Recovery Subsystem as defined in RM0091 Rev. 5 2014-02-07 07:46:54 +01:00
Frantisek Burian
55750d5dc6 [F0] Updated RCC module to be compatible wih RM0091 Rev. 5 2014-02-07 07:46:53 +01:00
Felix Held
b5d937a00c add memory map and irq table for sam3s and sam3u devices 2014-02-06 23:06:55 +01:00
Frantisek Burian
8d5ad52e0f Fix the stm32f0 evident bugs 2014-02-06 11:23:01 +01:00
Stefan Agner
7681597e42 Use type suffix to avoid warnings
When compiling with all warnings enabled, some defines can lead to
warning due to missing unsigned type suffix:

warning: integer overflow in expression [-Woverflow]

This fix should not affected behavior at all, since calculation with
such overflows lead to the same actual address when writing to that
location. However, it makes the warning disappear and also defines
the right data type for a memory location.
2014-02-06 00:59:39 +01:00
Ken Sarkies
0af6d06eda Deduplication of flash code for STM32F0 and F1.
Extension of code for STM32F1 to allow for dual bank series XL.
Small changes to documentation for F2, F4 and L1 to add a parameter reference.

Tested with STM32F103RBT6
(note: tests show that the PG bit must be cleared after programming, otherwise
a subsequent erase attempt fails. This has been added to flash_program_half_word
for F0 and F1 only. A fix for the other families is not included in this PR.)
2014-02-06 00:52:42 +01:00
Frantisek Burian
a4d9a41093 [Style] Don't use editor droppings in files, please. 2014-02-06 00:46:05 +01:00
cmcmanis
07d0076934 Updates for STM32F429 chip
After a few rounds of review, changes are added to support
additional peripherals of the STM32F427/429
2014-02-06 00:41:52 +01:00
Karl Palsson
27bc12de61 stm32: unify bulk of adc convenience functions
This unifies stm32f1, l1, and f4 convenience functions for adc.  The code
should be useable for f2 and f37x as well, but that needs hardware for testing,
and there was no existing implementation. This is the reason for the
"adc_common_v1.c" name, as trying to put all the different families into the
common file name has become too cumbersome.

All of the deprecated routines have been dropped, they've been marked
deprecated for a very long time now, and porting them seemed unnecessary.

This has been tested on f1, l1 and f4 discovery boards, and is based on some
existing l1/f1 unification code from
https://github.com/karlp/libopencm3/tree/rme_l1_master
2014-02-05 10:39:00 +00:00
memeruiz
cf21290488 [stm32f3] Moving common f0 an f3 functions together. New init_master function. 2014-02-01 21:11:58 +01:00
Felix Ruess
8782a60b48 [stm32][f1|f3] fix adc_set_injected_sequence 2014-02-01 19:22:17 +01:00
Frantisek Burian
5ba8b10428 Add method to clear the systick value, that is undefined at startup. 2014-01-15 22:37:45 +01:00
Ken Sarkies
3c6e9fd56d Fix a number of top level doxygen issues.
So that the navigation pane works correctly in browsers.
Some additional doc fixes put in where found (but many more still to go).
Added some dummy .c and .h files to bring the associated docs into line.
makefile changed to allow 'make html' as well as 'make doc' (the latter only does html anyway).
2014-01-15 22:19:52 +01:00
Ken Sarkies
a54a12e1c9 Documentation added to flash modules for all STM32 families. 2014-01-15 22:09:36 +01:00
Piotr Esden-Tempski
a909b5ca9e [Style] Global style fix run. 2014-01-03 01:07:30 +01:00
a1ien
67efedec54 [STM32F2-F4:CRYPTO]Fix hash_set_last_word_valid_bits() 2014-01-02 22:17:46 +01:00
Frantisek Burian
d541c14110 [CM3] Systick Add helper function to easily set the desired frequency 2014-01-02 22:09:16 +01:00
BuFran
52758bb8fd [Ethernet] Add support for the ethernet module STM32Fxx7 and Micrel PHY 2014-01-02 22:02:54 +01:00
BuFran
723e1a69bd Better method of reset and clock handling with RCC, support L1, F1, F2, F3, F4 2014-01-02 22:00:11 +01:00
BuFran
6a41e5fccb [GENLINK] Moved linker template source to ld directory 2014-01-02 21:50:02 +01:00
molnarkares
f7620ae148 * unnecessary PG bit clearing removed from flash word and half-word programming to improve speed
* missing PG bit set is inserted at word programming
2014-01-02 21:41:33 +01:00
Frantisek Burian
db3dc42dd6 [CM3:DWT] Add the file to library build process for each target 2014-01-02 21:25:26 +01:00
Frantisek Burian
7ccc0d053e [CM3] Add register definitions for Debug Watch Trace point.
Add provision functions for the use of CPU counter as a high-resolution timer for code benchmarking purposes
2014-01-02 21:25:26 +01:00
Onno Kortmann
fe6b542357 STM32F0: Correctly clear pll source bits. 2013-12-16 19:42:21 +00:00
Onno Kortmann
f622437cfb STM32F0: Fix PLL multiplication factor for 48MHz setup
It was set to overclocking configuration!
2013-12-16 19:37:07 +00:00
Onno Kortmann
868d65d872 STM32F0: Turn on PLL clock source when asked to
The STM32F05xxx/06xxx manual describes on p.98 (Sec 7.4.1) the RCC_CR
register, on which it says that bit 24 is the PLLON bit which has to be
enabled before using the PLL. This causes the PLL to be enabled with
rcc_osc_on(PLL).
2013-12-16 19:37:06 +00:00
Karl Palsson
0dce37a4d2 [sam] Eliminate warnings
the usart_enable/usart_disable() methods are for api compatibility with other
parts of libopencm3.
2013-12-16 19:31:23 +00:00
BuFran
6570f6eb07 Fix the order of ADC injected channel list
According to RM0090, page 301, paragraph 11.13.12 Note. (For F4, for F1 and F3 is it in the corresponding manuals)

The JSQR are filled always ending at SQR4 ie for those lists we must set this list:

(A)       ->                               JSQ4 = A,
(A,B)     ->                     JSQ3 = A, JSQ4 = B,
(A,B,C)   ->           JSQ2 = A, JSQ3 = B, JSQ4 = C,
(A,B,C,D) -> JSQ1 = A, JSQ2 = B, JSQ3 = C, JSQ4 = D,

The readed values are in correct order, starting from JDR1:

(A)       -> JDR1 = A,
(A,B)     -> JDR1 = A, JDR2 = B,
(A,B,C)   -> JDR1 = A, JDR2 = B, JDR3 = C,
(A,B,C,D) -> JDR1 = A, JDR2 = B, JDR3 = C, JDR4 = D,
2013-12-04 22:03:23 +00:00