rcc_osc_bypass_enable and rcc_osc_bypass_disable have been copy/pasted
around for the last time! There's a compile bit to check for L0/L1, but
otherwise this is just code duplication for no gain.
Originally suggested in https://github.com/libopencm3/libopencm3/pull/399
At least provide macros for each family that allows easy masking of the
full set of reset reason flags. Trying to provide a function that
provides these in random upper bits seems unclear at best.
Reserved bits are marked explicitly in the comments. ASCR defines
are changed to be consistent with the reference manual. HYSCR,
ASMR, CMR and CICR register defines are rewritten to be more
concise and readable.
The f1, f2, f4, l1 chip families have a similar "v1" i2c peripheral on board.
More recent f0, f3, l0, l3 chip families share another "v2" version of i2c.
This patch unifies headers and implementation for two types of i2c peripherals:
- rename: i2c_common_all.[ch] to i2c_common_v1.[ch]
- remove i2c_common_f24.h: extra I2C blocks are defined in specific headers
- use f3 i2c code as a basis for common "v2" i2c implementation
- add f0 i2c support: use "v2" i2c implementation
Tests:
- tested on a custom f0 board
- compile-tested both libopencm3 and libopencm3-examples for all stm32
Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Some parts used HSICLK, some used HSI. Most used NOCLK, f3 used
DISABLED. Try and move all to the shorter, simpler forms, instead of
having mixed defines for different targets for the same thing. Just
because the bits themselves are different doesn't mean we should make it
more difficult for users to port code.
MCOPRE prescaler definitions used a _SHIFT and a preshiftd definition.
The rest of the file uses separate _MASK and _SHIFT definitions.
Fix whitespace on the definitions while we're here.
Original implementation only checked whether the user had _selected_ the
clock, not whether it had actually switched to the clock or not. For
almost all cases, this made this function either a no-op, if you _had_
selected the clock, or a blocking loop if you hadn't selected it ahead
of time.
Fixes github issue #687
At least temp sensor, vrefint and vbat/vlcd should have consistent names and
consistent doxygen.
Dropped channel definitions that are the same as the raw number.
Original commits, while appearing clean and tidy, hadn't even been
compile tested. Trust no-one. Not even Scully.
Fixes: 770878e7b4ac12513e121e087261ca0972ba04e6
Fixes: 86d20ef00c00a14d7a4f0b834b9b608b2dd3638a
Fixes: 05ff0df32226dc28e22b98afde07bb886af9ddc9
As done by esden for the F4, remove typedefs and add prefixes to clock enums
This extends this to all stm32 families.
Let's not hide the fact that these variables are structs/enums.
We are filling up the namespace badly enough, we should be prefixing as
much as we can with the module names at least. As users we already run
often enough in namespace colisions we don't have to make it worse.
* CLOCK_3V3_xxx enums renamed to RCC_CLOCK_3V3_xxx
* clock enums (PLL, HSI, HSE ...) prefixed with RCC_
* scale enum of pwr module prefixed with PWR_
All the macro arguments that are user supplied, or potentially, wrap properly
in () as good practice.
Probably missed one or two, and a lot of them are possibly unnecessary, but
it's straightforward to just do it always.
Fixes github issue #321
The breaking changes here changes in header location, and changes in driver
name passed down to the usb stack.
Changes affect: stm32f102/f103, stm32l1, and some f3 parts
* instead of the confusingly generic "usb" use the name "st_usbfs" for the USB
Full speed peripheral ST provides in a variety of their stm32 products.
Include directives should change as:
#include <libopencm3/stm32/usb.h> => <libopencm3/stm32/st_usbfs.h>
* instead of the confusingly specific "f103" name for the driver, use
"st_usbfs_v1" [BREAKING_CHANGE]
Instead of:
usbd_init(&stm32f103_usb_driver, .....) ==>
usbd_init(&st_usbfs_v1_usb_driver, .....) ==>
The purpose of these changes is to reduce some confusion around naming, but
primarily to prepare for the "v2" peripheral available on stm32f0/l0 and some
f3 devices.
Work by Frantisek Burian, Kuldeep Singh Dhaka, Robin Kreis, fenugrec and zyp
on irc, and all those forgotten.
This adds MCO source selection to some targets, and removes and standardizes
the mask/shift usage for all targets. For devices that support MCO2, this
supports only MCO1. No attempt has been made to extract MCO prescaler, which
is not available on all F1 and F3.
Rename rcc_ppre1_frequency and rcc_ppre2_frequency to rcc_apb1_frequency and rcc_apb2_frequency
Also add rcc_ahb_frequency (although it is not set correctly in all cases) which will be fixed by
the rcc commits later. Also fixup the only use in the library of these variables, the USART code.
And fix the typos that resulted
Make l1 generic too
Latest versions of all reference manuals refer to the address as SPIx_BASE, and
simply name some of the individual registers as SPI_I2SXXXX. Likewise, the
interrupts are simply SPIx, not SPIx/I2Sx. Rather than hacking more duplicates
into the F0 and L0 parts where this was turning up, remove the pointless _I2S_
from SPI2/SPI3 and make it all consistent
Compile tested only, with the examples collection.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Fixes#331Fixes#347
There's more exti lines on many more devices now. F0 and F3 have extras, as did
L1 and L0. There's no real reason not to have higher order EXTI definitions
defined at the top level, and it reduces the number of files to merge together
to find all definitions for the bigger devices.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Fixes#338
to remove variations, redundancies, add missing, fix errors. All c files
refer only to the dispatch style headers in /include/stm32. Those headers
#include memorymap.h and cm3/common.h. All references to
these are removed from the family specific headers. Ethernet untouched as
it appears incomplete.
Added dummy spi.c for F0/F3. Fix some doxygen anomalies.
When compiling with all warnings enabled, some defines can lead to
warning due to missing unsigned type suffix:
warning: integer overflow in expression [-Woverflow]
This fix should not affected behavior at all, since calculation with
such overflows lead to the same actual address when writing to that
location. However, it makes the warning disappear and also defines
the right data type for a memory location.
Extension of code for STM32F1 to allow for dual bank series XL.
Small changes to documentation for F2, F4 and L1 to add a parameter reference.
Tested with STM32F103RBT6
(note: tests show that the PG bit must be cleared after programming, otherwise
a subsequent erase attempt fails. This has been added to flash_program_half_word
for F0 and F1 only. A fix for the other families is not included in this PR.)
This unifies stm32f1, l1, and f4 convenience functions for adc. The code
should be useable for f2 and f37x as well, but that needs hardware for testing,
and there was no existing implementation. This is the reason for the
"adc_common_v1.c" name, as trying to put all the different families into the
common file name has become too cumbersome.
All of the deprecated routines have been dropped, they've been marked
deprecated for a very long time now, and porting them seemed unnecessary.
This has been tested on f1, l1 and f4 discovery boards, and is based on some
existing l1/f1 unification code from
https://github.com/karlp/libopencm3/tree/rme_l1_master
This pulls out all the common header definitions for the F1, L1, F4 and F37x
parts. It's verified against the datasheet for F2 as well, but we don't have
any good F2 test boards or any support for that yet. (The F2 header would be
_exactly_ the same as the F4 header, so it's a target for a future round of
unification, not this one)
Tested with f1, f4 and l1 examples from the examples repository.
So that the navigation pane works correctly in browsers.
Some additional doc fixes put in where found (but many more still to go).
Added some dummy .c and .h files to bring the associated docs into line.
makefile changed to allow 'make html' as well as 'make doc' (the latter only does html anyway).
This converts all the YAML files to JSON files, as json parsing is built
into python instead of being a separate library requiring installation.
YAML is a superset of JSON, but putting comments in is not quite as obvious
as it is in yaml.
The following glue was used to convert yaml to json:
python -c 'import sys, yaml, json; json.dump(yaml.load(sys.stdin), sys.stdout, indent=4)' < $1 > $2
Clearly I haven't tested this on every single platform, and this
doesn't address the large blobs of yaml in the lpc4300 scripts directory,
only the cortex NVIC generation process.
I've tested a few IRQ driven example apps, and I've checked the generated
output of some known cases like the LM3s that has explicit gaps, and they are
all generated correctly.
Add memorymap entries for ST calibration data, the vref internal, and the temp
sensor at 30C and 110C for the parts that provide this data.
F1 and F2 do not appear to have this anywhere.
DFF exists at bit 11 for f1, f2, f4 and l1, but the f0 and f3 have that bit as
CRC len and use CR2 for data size bits instead. The merging of the F3 and F0
and attempts to put common data in common places broke the l1 code.
F3 and F0 SPI headers are still almost completely identical.
STM32L1 has a different set of offsets, not just a different base
address, so we can't have common registers definitions. Also, out of
F0,F1,F2,F3,F4,L1, only the F1 has the odd note about 2x16bit registers
and 2x32bit registers with one 16bit register marked as "This field
value is also reserved for a future feature." Therefore, replace the
awkward reading out as multiple words and just copy them in.
F0,F2,F3,F4 were missing definitions altogether.
This does _not_ attempt to address the problem of the mismatched base
addresses for Medium+ and High Density L1 parts.
