708 Commits

Author SHA1 Message Date
Karl Palsson
2a61740a90 stm32f1: rcc: Fix TIM17/TIM18 enable bits
the RCC_TIM17 and RCC_TIM18 macros used in the "new" style were ok, just
the old style raw bit definitions.

Reported-by: Karl Hammar <karl@aspodata.se>
2017-06-17 21:54:07 +00:00
Fabián Inostroza
98ff5c23aa stm32: can: Add support for getting the message timestamp.
Provide an optional parameter to receive the timestamp in
2017-06-08 23:01:45 +00:00
Fabián Inostroza
fac1013ccb stm32: can: fix timestamp mask and shift amount. 2017-06-08 23:01:45 +00:00
Karl Palsson
bc898d1f92 stm32l0: rcc: Add clock struct setup helper
Based on l1, l4 and friends.
2017-06-08 23:01:45 +00:00
Karl Palsson
ec1d2855b0 stm32l1: rcc: use better naming for flash wait states
More compatible with developments in l0/l4/f7, and just a better choice
of names overall.
2017-06-08 23:01:45 +00:00
Karl Palsson
29c712326f stm32: rcc: extract osc_bypass functions
rcc_osc_bypass_enable and rcc_osc_bypass_disable have been copy/pasted
around for the last time!  There's a compile bit to check for L0/L1, but
otherwise this is just code duplication for no gain.
2017-06-08 23:01:45 +00:00
Karl Palsson
2547bf66d9 stm32l0: flash: use common functionality
Provides all the basic core functionality shared with L1.  No special L0
functionality supported at this point.
2017-06-08 23:01:45 +00:00
Karl Palsson
ce787c0f40 stm32l1: flash: extract common code
Extracted all code that will be common with l0.  Compared with ref mans
for l0 and l4.  No functional change, just moving things getting ready.
2017-06-08 23:01:45 +00:00
Karl Palsson
0f4c032548 trivial: change include guard name to match file
File was renamed to -vX style.
2017-06-08 23:01:45 +00:00
Karl Palsson
5af89ae596 stm32f3: can: use CAN1 compatibility naming
Makes it far easier to write portable code when CAN1 is always
available, not having to decide between CAN and CAN1.
2017-06-08 23:01:45 +00:00
Karl Palsson
ba0c97bf42 stm32f7: pwr: add more doxygen
Seeing as Matthew went to the effort of all the descriptions, it seemed
only reasonable to get them to show up in the generated docs too.
2017-06-08 23:01:45 +00:00
Matthew Lai
17553da946 stm32f7: pwr: added basic support for pwr (VOS and overdrive) 2017-06-08 23:01:45 +00:00
Karl Palsson
6678da39bd stm32: i2c: Support auto speed configuration
For both v1 and v2, support automatic calculation of timing registers
for 100khz and 400khz i2c modes.

Based on work by Chuck in
https://github.com/libopencm3/libopencm3/pull/470 for v1
2017-06-08 23:01:45 +00:00
Karl Palsson
2f4f8ad85b stm32: can: BTR baud rate prescaler is a 10 bit field
Reported on the mailing list, verified in RM0090 and RM008
2017-05-08 10:49:45 +00:00
Matthew Lai
383fafc862 stm32: renamed pwr_common_all to pwr_common_v1, and pwr_common_l01 to pwr_common_v2 2017-03-30 21:48:08 +00:00
Karl Palsson
d1d511c6f4 stm32: rcc: add reset reason group flags.
Originally suggested in https://github.com/libopencm3/libopencm3/pull/399

At least provide macros for each family that allows easy masking of the
full set of reset reason flags.  Trying to provide a function that
provides these in random upper bits seems unclear at best.
2017-03-30 21:48:08 +00:00
Marek Koza
904345eaf1 stm32: l1: Change RI defines to be more readable
Reserved bits are marked explicitly in the comments. ASCR defines
are changed to be consistent with the reference manual. HYSCR,
ASMR, CMR and CICR register defines are rewritten to be more
concise and readable.
2017-03-30 21:48:08 +00:00
Marek Koza
a10bc7071a stm32: l1: Add routing interface register definitions 2017-03-30 21:48:08 +00:00
Jordi Pakey-Rodriguez
90d8bd6753 stm32f234: flash: Add FLASH_ACR_LATENCY_MASK 2017-03-30 21:48:08 +00:00
Jordi Pakey-Rodriguez
6798cee2a5 stm32f2+: flash: Rename FLASH_ACR_XCE -> FLASH_ACR_XCEN
Match the datasheet register names better.

squish into xcev
2017-03-30 21:48:08 +00:00
Karl Palsson
b40c72828d stm32: i2c: provide "transfer" level helper routines
For both v1 and v2, provide routines to help do arbitrary length
write/read transfers.

Tested with multiple byte writes and reads, for both 100khz and 400khz,
with repeated starts and stop/starts.  However, only tested (presently)
with a single i2c target device, a Sensiron SHT21 sensor.  Extended
testing against eeproms and alternative devices would be useful
2017-03-30 21:48:08 +00:00
Karl Palsson
fb3b5e08f3 stm32: i2c-v2: drop overly restrictive helpers.
* didn't follow naming conventions
* overly restricted to single byte register style commands.

Will be replaced by freeform transfer functions
2017-03-30 21:48:08 +00:00
Karl Palsson
1edcc1b7da stm32: i2c-v2: drop overly specific speed helpers
Will be replaced by generic speed helpers.
2017-03-30 21:48:08 +00:00
Karl Palsson
24225816a1 stm32: i2c-v2: simplify boolean functions
No need to check results and return 1 or 0.  The result itself is
suitable for use directly as a boolean, and a boolean is the intended
outcome.
2017-03-30 21:48:08 +00:00
Karl Palsson
0259102560 stm32f0: drop superfluous intermediate speed helpers
If you're interested in slightly underclocking or midrange speeds,
you're into custom environments.  Drop all the "helpers" for these odd
speeds.  This is not the max speed for any existing f0 part.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2017-03-30 21:48:07 +00:00
Sergey Matyukevich
7cacbbfb8d stm32/f0: enable clocking from HSE crystal
The following four new functions enable clocking SoC from HSE crystal:
	rcc_clock_setup_in_hse_8mhz_out_{8,16,32,48}mhz

These functions start HSE as external clock and feed its output to PLL
if higher frequency is needed.

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
 -> Dropped 8,16,32Mhz functions as superfluous.
2017-03-30 21:48:07 +00:00
Sergey Matyukevich
1b97ecefff stm32/f0: more clock helper functions
Add two clock helper defines and functions:
- rcc_set_pll_source: select PLL entry clock source
- rcc_set_pllxtpre: HSE divider for PLL input clock

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
2017-03-30 21:48:07 +00:00
Karl Palsson
ca7b27e039 stm32: i2cv2: drop i2c_set_clock_frequency
It's not implemented, and not meaningful for i2c v2 peripheral
2017-03-30 21:48:07 +00:00
Karl Palsson
623fabca5f stm32l0: rcc: add new peripheral enable bits
I2C3, USART4/5, GPIOE
2017-03-30 21:48:07 +00:00
Karl Palsson
b556a72fdb stm32l0: use current RCC bit names
Early revisions of the reference manuals used different names for the
touch sense controller and firewall bits.  These have now been changed
to be more in line with other families, and as these parts and bits were
new in this library, simply move forward to the current naming
convention.
2017-03-30 21:48:07 +00:00
Sergey Matyukevich
59ef83a440 stm32: l0/l4: add i2c support
According to reference manuals both l0 and l4 have "v2" i2c peripheral.
This patch adds i2c support to l0 and l4 using previously unified "v2" i2c
headers and implementation.

No real hardware has been tested so far. Only compilation tests for both
libopencm3 and libopencm3-examples for all stm32 families.

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
2017-03-30 21:48:07 +00:00
Sergey Matyukevich
ef91856ac1 stm32: unify i2c implementations
The f1, f2, f4, l1 chip families have a similar "v1" i2c peripheral on board.
More recent f0, f3, l0, l3 chip families share another "v2" version  of i2c.

This patch unifies headers and implementation for two types of i2c peripherals:

- rename: i2c_common_all.[ch] to i2c_common_v1.[ch]
- remove i2c_common_f24.h: extra I2C blocks are defined in specific headers
- use f3 i2c code as a basis for common "v2" i2c implementation
- add f0 i2c support: use "v2" i2c implementation

Tests:
- tested on a custom f0 board
- compile-tested both libopencm3 and libopencm3-examples for all stm32

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
2017-03-30 21:48:07 +00:00
Sergey Matyukevich
43736cf03f stm32/f0: RTC clock helpers
Add three more RTC clock helper functions:

- rcc_set_rtc_clock_source
  RTC on stm32/f0 can be clocked from the following three
  sources: LSI, LSE (32.768Hz), HSE/32.

- rcc_enable_rtc_clock
- rcc_disable_rtc_clock
  enable/disable clocking RTC module using selected clock source

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
2017-03-30 21:48:07 +00:00
Karl Palsson
d2540e5fc6 stm32f7: rcc: replace magics with existing defines
The defines already existed, use them, rather than the copied constants
from F4 code.
2017-03-30 21:48:07 +00:00
Sync
c285bcb493 stm32f7: rcc: initial clock config for disco board
Add clock config for the 25MHz crystal found on the discovery board.
Verified to work on the STM32F7-Disco.

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Modified namespaces and types->structs to avoid namespace pollution as
was fixed for other families in:

3a7cbec7: stm32l/stm32f: name space standardization [BREAKING]
2017-03-30 21:48:07 +00:00
Sync
3fc0c9d001 stm32f7: rcc: intial stubs support
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
(Added defines and used them)
2017-03-30 21:48:07 +00:00
Karl Palsson
7ee1d948e9 stm32f0:usart: Correctly allow >8bit words.
Make them 16bit regs, like on other periphs.  This allows proper access
to the "8th" bit.  (0..8 is 9 bits, not 8)

Found and reported in https://github.com/libopencm3/libopencm3/pull/651
2017-03-30 21:48:07 +00:00
Jonathan Challinger
7f8b32efed stm32f3: include CAN 2017-03-30 21:48:07 +00:00
Karl Palsson
d964dcfca4 stm32:usart: drop usart_get_interrupt_source()
It was never complete, even for F1 family code, and went on to be even
less complete for f0 and f3.  The usefulness of a library function to
check for both the irq being enabled _and_ the status flag is highly
questionable, and caused known user confusion.

The existing, much simpler, and fully functional usart_get_flag() is
a good replacement in almost all sane use cases.

Fixes https://github.com/libopencm3/libopencm3/issues/734
2017-03-30 21:48:07 +00:00
Karl Palsson
f07b58c6d8 stm32:rng: add helper to actually get random numbers
Simplified blocking API, with an async routine if you really need it.
Follows as best as I can understand the reference manual, but testing
those conditions will be difficult.
2017-03-30 21:48:07 +00:00
Karl Palsson
05829037de stm32:rng: add common v1 to l0,l4,f7
This is a common peripheral based on reference manual inspection.
2017-03-30 21:48:07 +00:00
Karl Palsson
2476099f29 stm32:rng: f4 rng peripheral is common with at least f2
Pull it up as common code immediately. Rename to v1, extract to common
with a doxygen marker stubs, add to F2 makefiles.
2017-03-30 21:48:07 +00:00
Sulter
ac45247f60 stm32f4:rng: basic functions with documentation.
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Removed higher level helpers from this commit, they are not a very
friendly API to use.
2017-03-30 21:48:07 +00:00
Karl Palsson
c9c5cb7c9c style: fix some of the easier style bugs
No real changes.
2017-03-30 21:48:07 +00:00
Matthew Lai
62b58555e2 stm32: rcc: added missing ifdef for STM32F7 in rcc 2017-02-28 16:57:20 +00:00
Matthew Lai
b1839265f9 stm32: syscfg: fixed copy and paste error in comment 2017-02-28 16:57:09 +00:00
Lixing Ding
13fe431919 stm32: timer: fix TIM_CCMR2 definitions
CC3S and CC4S channel names were badly copy/pasted from CCMR1
2017-02-15 09:55:24 +00:00
Dave Hylands
755ce402e2 stm32:desig: Add DFU compatible serial generation
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Modified to provide better doxygen and consistent api names.
2017-01-10 23:07:00 +00:00
Karl Palsson
5bf61c537f trivial: stop referring to STM32F when we mean all 2017-01-10 23:06:59 +00:00
David Sidrane
cf80e2bd5e stm32f4: USB support for newer OTG cores
Support for the  conflicting bit definitions for vbus sensing on core id
version 0x2000+

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2017-01-10 22:32:20 +00:00