44 Commits

Author SHA1 Message Date
Niels Moseley
4c311cfa90 Added some links to technical information. 2019-05-02 13:45:38 +02:00
Niels Moseley
0788de4162 Added youtube video link to README.md 2018-09-12 22:40:17 +02:00
Niels Moseley
5ba9d9bedb Renamed file. 2018-01-12 02:32:20 +01:00
Niels Moseley
363c6c8c62 * Fixed issues for the borken ISE verilog compiler.
* Added beginnings of Spartan 3E starterkit board project.
2018-01-12 02:29:13 +01:00
Niels Moseley
eab24a0896 Updated license information in each verilog source file. 2018-01-12 02:06:27 +01:00
Niels Moseley
198c3c822a Updated README.md 2018-01-12 01:58:12 +01:00
Niels Moseley
47a9aaa876
Create LICENSE 2018-01-12 01:56:56 +01:00
Niels Moseley
b5dc1e882a Added missing segmentdisplay.v file 2017-10-29 23:24:58 +01:00
Niels Moseley
4c5a4c404d fixed allophone 0x3F. 2017-10-29 21:16:58 +01:00
Niels Moseley
f82d3c74df Added hex display drivers to the DE0 board so it will display the allophone codes while playing. 2017-10-27 01:26:35 +02:00
Niels Moseley
1c293f13e8 Added pre-emphasis to PWMDAC - works but not impressed 2017-10-26 21:29:34 +02:00
Niels Moseley
42ad37a956 Updated DAC lowpass filter in documentation 2017-10-26 17:57:09 +02:00
Niels Moseley
8afd1af0a7 update DE0 readme.md 2017-10-26 17:07:37 +02:00
Niels Moseley
1194eec79d Updated readme.md 2017-10-26 17:00:14 +02:00
Niels Moseley
5d7c52c0e7 Re-instated the PWMDAC, as SDDAC will sound sh*t without a proper interpolator 2017-10-26 16:56:55 +02:00
Niels Moseley
a2432a5e55 Added 2nd order sigma-delta DAC. Added changes suggested by Clifford Wolf. 2017-10-26 16:39:09 +02:00
Niels Moseley
45afdd3500 Added MATLAB filter code 2017-10-26 00:48:40 +02:00
Niels Moseley
7d1198ee1b Almost working DE0 board version 2017-10-26 00:47:50 +02:00
Niels Moseley
0251299e0e Added start of DE0 board/project 2017-10-25 19:37:19 +02:00
Niels Moseley
8c88f5f042 updated readme.md 2017-10-24 22:55:02 +02:00
Niels Moseley
16df753e3f updated readme.md 2017-10-24 22:54:07 +02:00
Niels Moseley
be460901e6 updated readme.md 2017-10-24 22:36:51 +02:00
Niels Moseley
1b40dbe06f updated readme.md 2017-10-24 22:31:40 +02:00
Niels Moseley
10d9735e11 First working simulation of 'hello, world' :) 2017-10-24 21:49:05 +02:00
Niels Moseley
31163effd9 Updated filter engine FSM to have named states and separated clocked and non-clocked processes. Fixed bug in spmul which caused incorrect sign handling in final product 2017-10-24 19:40:56 +02:00
Niels Moseley
22b3443358 Fixed python script to generate sign-magnitude coeffs instead of 2s complement ones. Filter engine FSM needs revisiting. 2017-10-24 00:34:54 +02:00
Niels Moseley
48322725f6 Added 8-bit to 10-bit coefficient expander 2017-10-23 20:53:02 +02:00
Niels Moseley
704cd3d4cb non-working top level 2017-10-23 02:15:45 +02:00
Niels Moseley
2f89161c65 Added source and testbench 2017-10-21 02:25:07 +02:00
Niels Moseley
bdcd8a3d8f Removed superfluous comments. Added 2x/double_mode for A1 coefficients to filter engine. 2017-10-21 00:38:12 +02:00
Niels Moseley
cf89706963 Fix bugs in the filter engine FSM. Verified correct behaviour with a 2nd order section. 2017-10-18 22:03:16 +02:00
Niels Moseley
541fb228ed Added filter engine 2017-10-18 17:19:15 +02:00
Niels Moseley
b9789bc4c4 serial/parallel multiplier now supports sign-magnitude coefficients 2017-10-10 02:55:49 +02:00
Niels Moseley
4f30621f28 Added serial/parallel multiplier. 2017-10-10 02:27:48 +02:00
Niels Moseley
1d624a482a Updated PWMDAC test bench 2017-10-10 00:54:20 +02:00
Niels Moseley
8e3de97977 8-bit PWM dac 2017-10-10 00:25:52 +02:00
Niels Moseley
70b80d4154 . 2017-10-09 23:29:27 +02:00
Niels Moseley
b21876bb36 . 2017-10-09 23:24:43 +02:00
Niels Moseley
8d9c8b11a3 . 2017-10-09 23:24:26 +02:00
Niels Moseley
27110e7692 . 2017-10-09 23:24:05 +02:00
Niels Moseley
e936d57753 Updated README.md 2017-10-09 23:16:47 +02:00
Niels Moseley
6589cd7f70 Updated readme. 2017-10-09 23:16:08 +02:00
Niels Moseley
63dce1f2c1 Updated README.md 2017-10-09 23:12:43 +02:00
Niels Moseley
4a9909e27d Initial commit 2017-10-09 22:16:31 +02:00